Datasheet

Revision History for the MPC5566 Data Sheet
MPC5566 Microcontroller Data Sheet, Rev. 3
Freescale
55
5 Revision History for the MPC5566 Data Sheet
The history of revisions made to this data sheet are listed and described in this section. The information
that has changed from a previous revision of this document to the current revision is listed for each revision
and are grouped in the following categories:
• Global and text changes
• Table and figure changes
Within each category, the information that has changed is listed in sequential order.
5.1 Information Changed Between Revisions 2.0 and 3.0
The following table lists the information that changed in the tables between Rev. 2.0 and 3.0. Click the
links to see the change.
5.2 Information Changed Between Revisions 1.0 and 2.0
The following table lists the information that changed in the tables between Rev. 1.0 and 2.0. Click the
links to see the change.
Table 32. Changes Between Rev. 2.0 and 3.0
Location
Description of Changes
Section 3.7,
“Power-Up/Down
Sequencing”
Added the following paragraph in Section 3.7, “Power-Up/Down Sequencing”
“During initial power ramp-up, when Vstby is 0.6v or above. a typical current of 1-3mA and
maximum of 4mA may be seen until VDD is applied. This current will not reoccur until Vstby is
lowered below Vstby min. specification”.
Moved Figure 2 (fISTBY Worst-case Specifications) to Section 3.7, “Power-Up/Down
Sequencing”.
Section 3.8, “DC
Electrical
Specifications
In Table 9 (DC Electrical Specifications (T
A
= T
L to
T
H
)) for Spec 27d the Characteristic “Refer to
Figure 3 for an interpolation of this data” changed to “RAM standby current”.
Changed the footnote attached to IDD_STBY to “The current specification relates to average
standby operation after SRAM has been loaded with data. For power up current see
Section 3.7, “Power-Up/Down Sequencing”,Figure 2 (fISTBY Worst-case
Specifications).
Removed the footnote “Figure 3 shows an illustration of the IDD_STBY values interpolated for
these
temperature values”.