Datasheet

2 MPC565/MPC566 Product Brief MOTOROLA
Block Diagram
Two queued serial multi-channel modules (QSMCM A, QSMCM B), each of which contains a
queued serial peripheral interface (QSPI) and two serial controller interfaces (SCI/UART)
•-40
°C – 125°C ambient temperature, -40°C – 85°C for suffix C devices, -55°C– 125°C for
suffix A devices
Debug features:
A J1850 (DLCMD2) communications module
A Nexus debug port (class 3) – IEEE-ISTO 5001-1999
JTAG and background debug mode (BDM)
Packaging and Electrical
1.1 Block Diagram
Figure 1 is a block diagram of the MPC565.
Figure 1. MPC565 Block Diagram
E-Bus
PowerPC
Core
L-Bus
U-Bus
IMB3
Flash
512 Kbytes
+
FP
USIU
Flash
512 Kbytes
L2U
I/F
UIMB
QSMCM
MIOS14
DPTRAM
6 Kbytes
READI
JTAG
TPU3
QADC64E
QSMCM
TPU3
DPTRAM
4 Kbytes
TPU3
Tou
DLCMD2
32 Kbyte CALRAM A
4 Kbyte Overlay
4 Kbyte CALRAM B
4 Kbyte Overlay
CAN
Tou
CAN
Tou
CAN
w/AMUX
QADC64E
w/AMUX
Buffer
Burst
Controller 2
DECRAM
(4Kbytes)
28 Kbytes SRAM
No Overlay
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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