Datasheet

MOTOROLA MPC565/MPC566 Product Brief 9
Additional MPC565 Differences
2.1 Additional MPC565 Differences
The following are additional differences between the MPC555 and the MPC565.
• SPI (MISO, MOSI, and SCK) pin drive.
— MPC565 provides 21-ns rise/fall with 200-pf load using CMOS (20%/70%) levels
• GPIO on MODCK1 pin outputs only 2.6 V
— MODCK1 pin is in keep-alive power section with no 5-V rail available
— 5.0-V compatibility modes
– Input is 5-V friendly
– 2.6-V output has less slew rate control
– 2.6-V: VOH = 2.3 V
• Power supplies for external bus pins
— QVDDL is quiet supply to hold non-switching outputs quiet even when noisy supply
(NVDDL) sags
— QVDDL supplies pre-drive and other pad logic
— NVDDL only supplies final PMOS driver stage
— QVDDL and NVDDL shorted on customer board after filtering
• Pull-up and pull-down changes during PORESET and HRESET
— All 2.6-V/5-V pads (external bus: address/data/control) pull down at reset
— All 5-V pads pull up at reset
— Additional control granularity in the PDMCR register
• No pull-ups on QSMCM SCI receive pads
• A_RXD1_QGPI1, A_RXD2_QGPI2, B_RXD1_QGPI1 pins do not have weak pull-up during
reset or any other time
• CLKOUT has 3 drive strength options
— Better matches drive to requirements to reduce EMI
— 25, 50, 100 pf instead of 45 and 90 pf
• Change reset value of ENGCLK to maximum divide (crystal/128)
— For a 4-MHz crystal, this is 31.25 KHz
– ENGCLK is selectable between 2.6 V and 5 V
• A daisy chain between UC3F modules allows either module to provide the reset configuration
word (RCW)
• Censorship operation
— A RCW bit controls whether or not the entire UC3F can be erased while censorship is violated
• BBC SPRs (PPC regs) access in two clocks instead of one clock
• CALRAM internal protection block size is 8 Kbytes
— Instead of 4 Kbytes on MPC555 LRAM
• CALRAM causes machine check exception instead of data storage interrupt (DSI) exception in
certain cases
— For non-overlay CPU core accesses, a DSI exception is taken
— For overlay accesses and any non-core access (slave mode), a machine check exception is
taken
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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