Datasheet

MPC8241 Integrated Processor Hardware Specifications, Rev. 10
Freescale Semiconductor 41
PLL Configuration
6 00110
13
Bypass Bypass
7 (Rev. B) 00111
12
50
6
–66
1
50–66 150–198 1 (Bypass) 3 (2)
7 (Rev. D) 00111
14
Not Available
8 01000 50
6
–66
1
50–66 150–198 1 (4) 3 (2)
9 01001 38
6
–66
1
76–132 152–264 2 (2) 2 (2)
A 01010 25–29
5
50–58 225–261 2 (4) 4.5 (2)
B 01011 45
3
–59
5
68–88 204–264 1.5 (2) 3 (2)
C 01100 30
6
–44
4
60–88 150–220 2 (4) 2.5 (2)
D 01101 45
3
–50
5
68–75 238–263 1.5 (2) 3.5 (2)
E 01110 25–44
5
50–88 150–264 2 (4) 3 (2)
F 01111 25
5
75 263 3 (2) 3.5 (2)
10 10000 25–44
5
75–132 150–264 3 (2) 2 (2)
11 10001 25–26
5
100–106 250–266 4 (2) 2.5 (2)
12 10010 50
6
–66
1
75–99 150–198 1.5 (2) 2 (2)
13 10011 Not available 4 (2) 3 (2)
14 10100 25–38
5
50–76 175–266 2 (4) 3.5 (2)
15 10101 Not available 2.5 (2) 4 (2)
16 10110 25–33
5
50–66 200–264 2 (4) 4 (2)
17 10111 25–33
5
100–132 200–264 4 (2) 2 (2)
18 11000 27
3
–35
5
68–88 204–264 2.5 (2) 3 (2)
19 11001 33
3
–53
5
66–106 165–265 2 (2) 2.5 (2)
1A 11010 50
18
–66
1
50–66 200–264 1 (4) 4 (2)
1B 11011 34
3
–44
5
68–88 204–264 2 (2) 3 (2)
1C 11100 44
3
–59
5
66–88 198–264 1.5 (2) 3 (2)
1D 11101 44
3
–66
1
66–99 165–248 1.5 (2) 2.5 (2)
1E (Rev. B) 11110
8
Not usable Off Off
1E (Rev. D) 11110 33
3
-38
5
66-76 231-266 2(2) 3.5(2)
Table 18. PLL Configurations (266-MHz Parts) (continued)
Ref
2
PLL_
CFG[0:4]
10,11
266-MHz Part
9
Multipliers
PCI Clock Input
(PCI_SYNC_IN)
Range
1
(MHz)
Periph Logic/
Mem Bus
Clock Range
(MHz)
CPU Clock
Range
(MHz)
PCI-to-Mem
(Mem VCO)
Mem-to-CPU
(CPU VCO)