Datasheet

MPC8245 Integrated Processor Hardware Specifications, Rev. 10
26 Freescale Semiconductor
Electrical and Thermal Characteristics
4.6.2 I
2
C AC Electrical Specifications
Table 13 provides the AC timing parameters for the I
2
C interfaces.
Pulse width of spikes which must be suppressed by
the input filter
t
I2KHKL
050ns2
Input current each I/O pin (input voltage is between
0.1 × OV
DD
and 0.9 × OV
DD
(max)
I
I
–10 10 μA3
Capacitance for each I/O pin C
I
—10pF
Notes:
1. Output voltage (open drain or open collector) condition = 3 mA sink current.
2. Refer to the MPC8245 Integrated Processor Reference Manual for information on the digital filter used.
3. I/O pins obstruct the SDA and SCL lines if the OV
DD
is switched off.
Table 13. I
2
C AC Electrical Specifications
All values refer to V
IH
(min) and V
IL
(max) levels (see Table 12).
Parameter Symbol
1
Min Max Unit
SCL clock frequency f
I2C
0 400 kHz
Low period of the SCL clock t
I2CL
4
1.3 — μs
High period of the SCL clock t
I2CH
4
0.6 — μs
Setup time for a repeated START condition t
I2SVKH
4
0.6 — μs
Hold time (repeated) START condition (after this period, the first
clock pulse is generated)
t
I2SXKL
4
0.6 — μs
Data setup time t
I2DVKH
4
100 — ns
Data input hold time:
CBUS compatible masters
I
2
C bus devices
t
I2DXKL
—
0
2
—
—
μs
Data output delay time: t
I2OVKL
—0.9
3
Set-up time for STOP condition t
I2PVKH
0.6 — μs
Bus free time between a STOP and START condition t
I2KHDX
1.3 — μs
Noise margin at the LOW level for each connected device (including
hysteresis)
V
NL
0.1 × OV
DD
—V
Table 12. I
2
C DC Electrical Characteristics
At recommended operating conditions with OV
DD
of 3.3 V ± 5%.