Datasheet

MPC8245 Integrated Processor Hardware Specifications, Rev. 10
Freescale Semiconductor 29
Electrical and Thermal Characteristics
Figure 18. PIC Serial Interrupt Mode Output Timing Diagram
Figure 19. PIC Serial Interrupt Mode Input Timing Diagram
4.8 IEEE 1149.1 (JTAG) AC Timing Specifications
Table 15 provides the JTAG AC timing specifications for the MPC8245 while in the JTAG operating mode
at recommended operating conditions (see Table 2) with LV
DD
= 3.3 V ± 0.3 V. Timings are independent
of the system clock (PCI_SYNC_IN).
Table 15. JTAG AC Timing Specification (Independent of PCI_SYNC_IN)
Num Characteristic Min Max Unit Notes
TCK frequency of operation 0 25 MHz
1 TCK cycle time 40 — ns
2 TCK clock pulse width measured at 1.5 V 20 — ns
3 TCK rise and fall times 0 3 ns
4TRST
setup time to TCK falling edge 10 — ns 1
5TRST
assert time 10 — ns
6 Input data setup time 5 — ns 2
7 Input data hold time 15 — ns 2
8 TCK to output data valid 0 30 ns 3
9 TCK to output high impedance 0 30 ns 3
10 TMS, TDI data setup time 5 — ns
S_CLK
S_RST
VM
VM
VM
S_FRAME
sys_logic_clk
VM
VM
VM
VM
4
3
5
4
6
S_CLK
S_INT
7
VM