Datasheet
MPC8245 Integrated Processor Hardware Specifications, Rev. 10
42 Freescale Semiconductor
PLL Configurations
2 00010
11
50
18
–66
1
50–66 225–297 50
18
–66
1
50–66 225–297 1 (4) 4.5 (2)
300011
11,14
50
17
–66
1
50–66 100–133 50
17
–66
1
50–66 100–133 1 (Bypass) 2 (4)
4 00100
12
25–46
4
50–92 100–184 25–46
4
50–92 100–184 2 (4) 2 (4)
6 00110
15
Bypass Bypass Bypass
7
Rev B
00111
14
60
6
–66
1
60–66 180–198 60
6
–66
1
60–66 180–198 1 (Bypass) 3 (2)
7
Rev D
00111
14
Not available 25 100 350 4(2) 3.5(2)
8 01000
12
60
6
–66
1
60–66 180–198 60
6
–66
1
60–66 180–198 1 (4) 3 (2)
9 01001
12
45
6
–66
1
90–132 180–264 45
6
–66
1
90–132 180–264 2 (2) 2 (2)
A 01010
12
25–37
5,7
50–74 225–333 25–38
5
50–76 225–342 2 (4) 4.5 (2)
B 01011
12
45
3
–66
1
68–99 204–297 45
3
–66
1
68–99 204–297 1.5 (2) 3 (2)
C 01100
12
36
6
–46
4
72–92 180–230 36
6
–46
4
72–92 180–230 2 (4) 2.5 (2)
D 01101
12
45
3
–63
5,7
68–95 238–333 45
3
–66
1
68–99 238–347 1.5 (2) 3.5 (2)
E 01110
12
30
6
–46
4
60–92 180–276 30
6
–46
4
60–92 180–276 2 (4) 3 (2)
F 01111
12
25–31
5
75–93 263–326 25–33
5
75–99 263–347 3 (2) 3.5 (2)
10 10000
12
30
6
–44
2
90–132 180–264 30
6
–44
2
90–132 180–264 3 (2) 2 (2)
11 10001
12
25–33
2,16
100–132 250–330 25–33
2,16
100–132 250–330 4 (2) 2.5 (2)
12 10010
12
60
6
–66
1
90–99 180–198 60
6
–66
1
90–99 180–198 1.5 (2) 2 (2)
13 10011
12
25–27
5
100–108 300–324 25–29
5
100–116 300–348 4 (2) 3 (2)
14 10100
12
26
6
–47
4
52–94 182–329 26
6
–47
4
52–94 182–329 2 (4) 3.5 (2)
15 10101
12
27
3
–33
5
68–83 272–332 27
3
–34
5
68–85 272–340 2.5 (2) 4 (2)
16 10110
12
25–41
5
50–82 200–328 25–43
5
50–86 200–344 2 (4) 4 (2)
17 10111
12
25–33
2
100–132 200–264 25–33
2
100–132 200–264 4 (2) 2 (2)
18 11000
12
27
3
–44
5
68–110 204–330 27
3
–46
5
68–115 204–345 2.5 (2) 3 (2)
19 11001
12
36
6
–66
1
72–132 180–330 36
6
–66
1
72–132 180–330 2 (2) 2.5 (2)
1A 11010
12
50
18
–66
1
50–66 200–264 50
18
–66
1
50–66 200–264 1 (4) 4 (2)
1B 11011
12
34
3
–55
5
68–110 204–330 34
3
–58
5
68–116 204–348 2 (2) 3 (2)
1C 11100
12
44
3
–66
1
66–99 198–297 44
3
–66
1
66–99 198–297 1.5 (2) 3 (2)
1D 11101
12
48
6
–66
1
72–99 180–248 48
6
–66
1
72–99 180–248 1.5 (2) 2.5(2)
Table 18. PLL Configurations (333- and 350-MHz Parts) (continued)
Ref
PLL_
CFG[0:4]
10,13
333 MHz Part
9
350 MHz Part
9
Multipliers
PCI Clock
Input
(PCI_
SYNC_IN)
Range
1
(MHz)
Periph
Logic/Mem
Bus Clock
Range
(MHz)
CPU
Clock
Range
(MHz)
PCI Clock
Input
(PCI_
SYNC_IN)
Range
1
(MHz)
Periph
Logic/Mem
Bus Clock
Range
(MHz)
CPU
Clock
Range
(MHz)
PCI-to-
Mem
(Mem
VCO)
Mem-to-
CPU
(CPU
VCO)