Datasheet

MPC8250 Hardware Specifications, Rev. 2
Freescale Semiconductor 13
Electrical and Thermal Characteristics
Note that although the specifications generally reference the rising edge of the clock, the following AC
timing diagrams also apply when the falling edge is the active edge.
Figure 3 shows the FCC external clock.
Figure 3. FCC External Clock Diagram
sp20 sp21 TDM inputs/SI 15 12 12 10
sp18a sp19a SCC/SMC/SPI/I2C inputs—internal clock (NMSI) 20 16 0 0
sp18b sp19b SCC/SMC/SPI/I2C inputs—external clock (NMSI) 5 4 5 4
sp22 sp23 PIO/TIMER/IDMA inputs 10 8 3 3
1
Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN.
Timings are measured at the pin.
Table 8. AC Characteristics for CPM Inputs
1
Spec Number
Characteristic
Setup (ns) Hold (ns)
Max Min 66 MHz 83 MHz 66 MHz 83 MHz
Serial ClKin
FCC input signals
FCC output signals
FCC output signals
Note: When GFMR[TCI] = 1
Note: When GFMR[TCI] = 0
sp16b
sp17b
sp36b/sp37b
sp36b/sp37b