Datasheet

MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0
Freescale Semiconductor 11
Electrical and Thermal Characteristics
I
OL
= 5.3mA
CS
[0-9]
CS
(10)/BCTL1
CS(11)/AP(0)
BADDR[27–28]
ALE
BCTL0
PWE(0:7)/PSDDQM(0:7)/PBS(0:7)
PSDA10/PGPL0
PSDWE/
PGPL1
POE
/PSDRAS/PGPL2
PSDCAS/PGPL3
PGTA/PUPMWAIT/PGPL4/PPBS
PSDAMUX/PGPL5
LWE
[0–3]LSDDQM[0–3]/LBS[0–3]/PCI_CFG[0–3]
3
LSDA10/LGPL0/PCI_MODCKH0
3
LSDWE/LGPL1/PCI_MODCKH1
3
LOE/LSDRAS/LGPL2/PCI_MODCKH2
3
LSDCAS/LGPL3/PCI_MODCKH3
3
LGTA/LUPMWAIT/LGPL4/LPBS
LSDAMUX/LGPL5/PCI_MODCK
3
LWR
MODCK1/AP(1)/TC(0)/BNKSEL(0)
MODCK2/AP(2)/TC(1)/BNKSEL(1)
MODCK3/AP(3)/TC(2)/BNKSEL(2)
I
OL
= 3.2mA
L_A14/PAR
3
L_A15/FRAME
3
/SMI
L_A16/TRDY
3
L_A17/IRDY
3
/CKSTP_OUT
L_A18/STOP
3
L_A19/DEVSEL
3
L_A20/IDSEL
3
L_A21/PERR
3
L_A22/SERR
3
L_A23/REQ0
3
L_A24/REQ1
3
/HSEJSW
3
L_A25/GNT0
3
L_A26/GNT1
3
/HSLED
3
L_A27/GNT2
3
/HSENUM
3
L_A28/RST
3
/CORE_SRESET
L_A29/INTA
3
L_A30/REQ2
3
L_A31
LCL_D(0-31)/AD(0-31)
3
LCL_DP(0-3)/C/BE(0-3)
3
PA[0–31]
PB[4–31]
PC[0–31]
PD[4–31]
TDO
V
OL
—0.4 V
1
The default configuration of the CPM pins (PA[0–31], PB[4–31], PC[0–31], PD[4–31]) is input. To prevent excessive
DC current, it is recommended to either pull unused pins to GND or VDDH, or to configure them as outputs.
Table 3. DC Electrical Characteristics
1
(continued)
Characteristic Symbol Min Max Unit