Datasheet
MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
50 Freescale Semiconductor
Package and Pin Listings
21.3 Pinout Listings
Following table shows the pin list of the MPC8306.
Table 52. MPC8306 Pinout Listing
Signal Package Pin Number Pin Type Power Supply Notes
DDR Memory Controller Interface
MEMC_MDQ[0] W5 IO GV
DD
—
MEMC_MDQ[1] V4 IO GV
DD
—
MEMC_MDQ[2] Y4 IO GV
DD
—
MEMC_MDQ[3] AB1 IO GV
DD
—
MEMC_MDQ[4] AA1 IO GV
DD
—
MEMC_MDQ[5] Y2 IO GV
DD
—
MEMC_MDQ[6] Y1 IO GV
DD
—
MEMC_MDQ[7] W2 IO GV
DD
—
MEMC_MDQ[8] G2 IO GV
DD
—
MEMC_MDQ[9] G1 IO GV
DD
—
MEMC_MDQ[10] F1 IO GV
DD
—
MEMC_MDQ[11] E2 IO GV
DD
—
MEMC_MDQ[12] E1 IO GV
DD
—
MEMC_MDQ[13] E4 IO GV
DD
—
MEMC_MDQ[14] F4 IO GV
DD
—
MEMC_MDQ[15] D1 IO GV
DD
—
MEMC_MDM[0] AB2 O GV
DD
—
MEMC_MDM[1] G4 O GV
DD
—
MEMC_MDQS[0] V5 IO GV
DD
—
MEMC_MDQS[1] F5 IO GV
DD
—
MEMC_MBA[0] L2 O GV
DD
—
MEMC_MBA[1] L1 O GV
DD
—
MEMC_MBA[2] R4 O GV
DD
—
MEMC_MA[0] M1 O GV
DD
—
MEMC_MA[1] M4 O GV
DD
—
MEMC_MA[2] N1 O GV
DD
—
MEMC_MA[3] N2 O GV
DD
—
MEMC_MA[4] P1 O GV
DD
—
MEMC_MA[5] N4 O GV
DD
—
MEMC_MA[6] P2 O GV
DD
—
MEMC_MA[7] R1 O GV
DD
—
