Datasheet

MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
64 Freescale Semiconductor
Clocking
Table 60. Suggested PLL Configurations
Conf No. SPMF
Core
PLL
CEPMF CEDF
Input Clock
Frequency
(MHz)
CSB
Frequency
(MHz)
Core
Frequency
(MHz)
QUICC
Engine
Frequency
(MHz)
1 0100 0000100 0111 0 33.33 133.33 266.66 233
2
0010 0000100 0111 1 66.67 133.33 266.66 233
3
0100 0000101 0111 0 33.33 133.33 333.33 233
4
0101 0000101 1001 0 25 125 312.5 225
5
0010 0000101 0111 1 66.67 133.33 333.33 233