Information

System Configuration
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 5-21
NOTE
An empty column cannot be used for this register. A function should be
selected so that the column is non-empty.
4–5 UART
UART_SOUT1 MSRCID0 (DDRID) — LSRCID0 00
UART_SIN1 MSRCID1 (DDRID) — LSRCID1
UART_SOUT2 MSRCID2 (DDRID) — LSRCID2
UART_SIN2 MSRCID3 (DDRID) — LSRCID3
6–7 IRQ IRQ[0] MCP_IN ——00
IRQ[1] MCP_OUT ——
IRQ[2] CKSTOP_OUT ——
IRQ[3] CKSTOP_IN —INTA
8–9 — — — — — —
10–11 I
2
C2
IIC_SDA2 CKSTOP_OUT ——00
IIC_SCL2 CKSTOP_IN ——
12–15 — — — — — —
16–19 — — — — — 00
20–23 — — — — — —
24–25 ETSEC1_A
TSEC1_TX_CLK TSEC1_GTX_
CLK125
———
26–31 — — — — — 00
1
When SICRL[SPI] = 0b01, SPICLK and SPISEL are in High-Z state.
Table 5-25. SICRL Bit Settings (continued)
SICRL[Bits] Value 0b00 0b01 0b10 0b11
Reset
Bits Group Pin Function 0 Pin Function 1 Pin Function 2 Pin Function 3