Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 13-51
Table 13-42–Table 13-45 describes buffer pointer page n.
Table 13-42. Buffer Pointer Page 0 (Plus)
Bits Name Description
31–12 Buffer Pointer (Page 0) A 4K-aligned pointer to physical memory. Corresponds to memory address bits 31–12.
11–8 EndPt Selects the particular endpoint number on the device serving as the data source or sink.
7 — Reserved, should be cleared. Reserved for future use and should be initialized by software
to zero.
6–0 Device Address This field selects the specific device serving as the data source or sink.
Table 13-43. iTD Buffer Pointer Page 1 (Plus)
Bits Name Description
31–12 Buffer Pointer
(Page 1)
This is a 4K aligned pointer to physical memory. Corresponds to memory address bits 31–12.
11 I/O Direction (I/O). This field encodes whether the high-speed transaction should use an IN or OUT PID.
0OUT
1IN
10–0 Maximum
Packet Size
This directly corresponds to the maximum packet size of the associated endpoint (wMaxPacketSize).
This field is used for high-bandwidth endpoints where more than one transaction is issued per
transaction description (for example, per microframe). This field is used with the Multi field to support
high-bandwidth pipes. This field is also used for all IN transfers to detect packet babble. Software
should not set a value larger than 1024 (0x400). Any value larger yields undefined results.
Table 13-44. Buffer Pointer Page 2 (Plus)
Bits Name Description
31–12 Buffer Pointer
(Page 2)
This is a 4K-aligned pointer to physical memory. Corresponds to memory address bits 31–12.
11–2 — Reserved, should be cleared. This bit reserved for future use and should be cleared.
1–0 Mult Indicates to the host controller the number of transactions that should be executed per transaction
description (for example, per microframe).
00 Reserved, should be cleared. A zero in this field yields undefined results.
01 One transaction to be issued for this endpoint per microframe
10 Two transactions to be issued for this endpoint per microframe
11 Three transactions to be issued for this endpoint per microframe
Table 13-45. Buffer Pointer Page 3–6
Bits Name Description
31–12 Buffer Pointer This is a 4K aligned pointer to physical memory. Corresponds to memory address bits 31–12.
11–2 — Reserved, should be cleared. These bits reserved for future use and should be cleared.