Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 13-55
13.5.4.4 siTD Buffer Pointer List (Plus)
DWords 4 and 5 are the data buffer page pointers for the transfer. This structure supports one physical page
cross. The most-significant 20 bits of each DWord in this section are the 4K (page) aligned buffer pointers.
The least-significant 12 bits of each DWord are used as additional transfer state.
Table 13-50 describes the siTD buffer pointer page 0.
Table 13-51 describes the siTD buffer pointer page 1.
13.5.4.5 siTD Back Link Pointer
DWord 6 of a siTD is simply another schedule link pointer. This pointer is always zero, or references a
siTD. This pointer cannot reference any other schedule data structure.
Table 13-52 describes the siTD back link pointer.
Table 13-50. siTD Buffer Pointer Page 0 (Plus)
Bits Name Description
31–12 Buffer Pointer
(Page 0)
Bits 31–12 are 4K page-aligned, physical memory addresses. These bits correspond to physical
address bits 31–12 respectively. The field P specifies the current active pointer
11–0 Current Offset The 12 least-significant bits of the Page 0 pointer is the current byte offset for the current page
pointer (as selected with the page indicator bit (P field)). The host controller is not required to write
this field back when the siTD is retired (Active bit transitioned from a one to a zero).
Table 13-51. siTD Buffer Pointer Page 1 (Plus)
Bits Name Description
31–12 Buffer Pointer
(Page 1)
Bits 31–12 are 4K page-aligned, physical memory addresses. These bits correspond to physical
address bits 31–12 respectively. The field P specifies the current active pointer
11–5 — Reserved, should be cleared.
4–3 TP Transaction position. This field is used with T-count to determine whether to send all, first, middle,
or last with each outbound transaction payload. System software must initialize this field with the
appropriate starting value. The host controller must correctly manage this state during the lifetime
of the transfer. The bit encodings are:
00 All. The entire full-speed transaction data payload is in this transaction (that is, less than or equal
to 188 bytes).
01 Begin. This is the first data payload for a full-speed transaction that is greater than 188 bytes.
10 Mid. This is the middle payload for a full-speed OUT transaction that is larger than 188 bytes.
11 End. This is the last payload for a full-speed OUT transaction that was larger than 188 bytes.
2–0 T-Count Transaction count. Software initializes this field with the number of OUT start-splits this transfer
requires. Any value larger than 6 is undefined.
Table 13-52. siTD Back Link Pointer
Bits Name Description
31–5 Back Pointer A physical memory pointer to an siTD