Information
Signal Descriptions
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
2-2 Freescale Semiconductor
Figure 2-1. MPC8308 Signal Groupings (1 of 2)
MDQ[0:31]
MDQS[0:3]
MBA[2:0]
MA[13:0]
32
4
3
14
MWE
MRAS
MCAS
MCS[0:1]
1
1
1
2
MCKE
1
MCK[0:2]
3
MDM[0:3]
4
MODT[0:1]
2
TSEC1_CRS
TSEC1_RX_CLK
TSEC1_GTX_CLK
1
1
1
TSEC1_TX_CLK/TSEC1_GTX_CLK125
TSEC1_RX_DV
TSEC1_RXD[3:0]
4
1
TSEC1_COL
1
1
1
1
TSEC1_RX_ER
4
TSEC1_TX_EN
TSEC1_TX_ER/LB_POR_CFG_BOOT_ECC
1
TSEC1_TXD[3:0]/CFG_RESET_SOURCE[0:3]
1
1
1
1
1
LGPL0, LFCLE
LCS
[0:3]
LWE0
, LFWE0, LBS0
LBCTL
LGPL1, LFALE
LGPL2, LOE
, LFRE
LGPL3, LFWP
LGPL4, LGTA, LUPWAIT, LFRB
4
1
1
1
DDR2
Memory
Interface
82 Signals
Local Bus
Interface
56 Signals
MPC8308
Enhanced
TSEC1_MDC
TSEC1_MDIO
1
1
Ethernet
Mgmt
Interface
2 Signals
3
MCK
[0:2]
LGPL5
LCLK0
1
eTSEC1
Ethernet
Interface
18 Signals
MECC[0:7]
8
MDM[8]
1
1
MDQS[8]
GPIO/
24 Signals
1
1
1
IRQ
[1]
IRQ
[2]
IRQ
[0]/MCP_IN
1
1
1
1
TCK
TDI
TDO
TMS
TRST
1
IPIC
Interface
4 Signals
JTAG
5 Signals
1
IRQ
[3]/
1
SPIMOSI
SPIMISO
SPICLK
SPISEL
1
1
1
SPI
Interface
4 Signals
LWE1, LBS1
1
/LBC_PM_REF_10
/MCP_OUT
/CKSTOP_OUT
/MSRCID4/LSRCID4
/MDVAL/LDVAL
CKSTOP_IN
/INTA
16
LD[0:15]
26
LA[0:25]
MVREF
1
eTSEC2
GPIO[0]/TSEC2_CRS
GPIO[1]/TSEC2_TX_ER
GPIO[2]/TSEC2_GTX_CLK
GPIO[3]/TSEC2_RX_CLK
GPIO[4]/TSEC2_RX_DV
GPIO[5:7]
GPIO[8]/TSEC2_RXD[0]
GPIO[9]/TSEC2_RX_ER
GPIO[10]/TSEC2_TX_CLK/TSEC2_GTX_CLK125
GPIO[11]/TSEC2_TXD[3]
GPIO[12]/TSEC2_TXD[2]
GPIO[13]/TSEC2_TXD[1]
GPIO[14]/TSEC2_TXD[0]
GPIO[15]/TSEC2_TX_EN
1
1
1
1
1
3
1
1
1
1
1
1
1
1
1
1
1
SD_CLK/GPIO[16]
SD_CMD/GPIO[17]
S
D_CD/GTM1_TIN1/GPIO[18]
SD_WP/GTM1_TGATE1
/GPIO[19]
SD_DAT[0]/GTM1_TOUT1
/GPIO[20]
SD_DAT[1]/GTM1_TOUT2/GPIO[21]
SD_DAT[2]/GTM1_TIN2/GPIO[22]
SD_DAT[3]/GTM1_TGATE2
/GPIO[23]
1
1
1
1
1
GTM1_TGATE3
GTM1_TIN4
GTM1_TGATE
4/GPIO[15]
GTM1_TIN3
1
1
1
1
GTM1_TOUT3/GPIO[9]
GTM1_TOUT
4/GPIO[10]
1
1
1
1
DUART
Interface
4 Signals
1
1
UART_SOUT[1]/MSRCID0/LSRCID0
UART_SOUT[2]/MSRCID2/LSRCID2
UART_SIN[1]/MSRCID1/LSRCID1
UART_SIN[2]/MSRCID3/LSRCID3
eSDHC/
GTM
Interface
14 Signals
TSEC1_GTX_CLK125/TSEC1_TX_CLK
1
GPIO[0]/TSEC2_COL
1
GPIO[5:7]/TSEC2_RXD[3:1]
3
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
1
1
1
1
