Information

Enhanced Three-Speed Ethernet Controllers
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
16-2 Freescale Semiconductor
Figure 16-1. eTSEC Block Diagram
16.2 Features
The eTSECs of the device include these distinctive features:
• IEEE 802.3, 802.3u, 820.3x, 802.3z, 802.3ac, 802.3ab compatible
• Support for different Ethernet physical interfaces:
— 10/100 Mbps IEEE 802.3 MII
— 10/100 Mbps RGMII
— 1000 Mbps full-duplex RGMII
•TCP/IP off-load
MAC Layer
Rx FIFO
2 Kbytes
Rx FIFO
Control
Tx FIFO
10 Kbytes
Clocks
To PHY
To PHY
GMII
Reduced
Pin I/F
MII
Mgmt
Ethernet
Address
Filter
Ethernet/
IP/TCP/UDP
Parser
Rx
Filing
Engine
TCP/IP
Checksum
Tx
Queue
Scheduler
RMON
Tx FIFO
Control
Rx BDC
Tx BDC
Host Interface Controller
1588
Register
Array
Register
Access
Control
Timer
Clock
1588
Timer
Regs
MII RGMII