Datasheet

MPC852T PowerQUICC™ Hardware Specifications, Rev. 4
Freescale Semiconductor 17
Bus Signal Timing
B24a A(0:31) and BADDR(28:30) to CS
asserted GPCM ACS = 11 TRLX = 0
(MIN = 0.50 × B1 – 2.00)
13.20 — 10.50 — 8.00 — 5.60 — ns
B25 CLKOUT rising edge to OE
,
WE
(0:3)/BS_B[0:3] asserted
(MAX = 0.00 × B1 + 9.00)
— 9.00 9.00 9.00 9.00 ns
B26 CLKOUT rising edge to OE
negated
(MAX = 0.00 × B1 + 9.00)
2.00 9.00 2.00 9.00 2.00 9.00 2.00 9.00 ns
B27 A(0:31) and BADDR(28:30) to CS
asserted GPCM ACS = 10, TRLX = 1
(MIN = 1.25 × B1 – 2.00)
35.90 — 29.30 — 23.00 — 16.90 — ns
B27a A(0:31) and BADDR(28:30) to CS
asserted GPCM ACS = 11, TRLX = 1
(MIN = 1.50 × B1 – 2.00)
43.50 — 35.50 — 28.00 — 20.70 — ns
B28 CLKOUT rising edge to WE
(0:3)/
BS_B[0:3] negated GPCM write access
CSNT = 0 (MAX = 0.00 × B1 + 9.00)
— 9.00 — 9.00 — 9.00 — 9.00 ns
B28a CLKOUT falling edge to WE
(0:3)/
BS_B[0:3] negated GPCM write access
TRLX = 0,1 CSNT = 1, EBDF = 0
(MAX = 0.25 × B1 + 6.80)
7.60 14.30 6.30 13.00 5.00 11.80 3.80 10.50 ns
B28b CLKOUT falling edge to CS
negated
GPCM write access TRLX = 0,1 CSNT = 1
ACS = 10 or ACS = 11, EBDF = 0
(MAX = 0.25 × B1 + 6.80)
— 14.30 — 13.00 — 11.80 — 10.50 ns
B28c CLKOUT falling edge to
WE
(0:3)/BS_B[0:3] negated GPCM write
access TRLX = 0,1 CSNT = 1 write access
TRLX = 0,1 CSNT = 1, EBDF = 1
(MAX = 0.375 × B1 + 6.6)
10.90 18.00 10.90 18.00 7.00 14.30 5.20 12.30 ns
B28d CLKOUT falling edge to CS
negated
GPCM write access TRLX = 0,1 CSNT =
1, ACS = 10, or ACS = 11, EBDF = 1
(MAX = 0.375 × B1 + 6.6)
— 18.00 — 18.00 — 14.30 — 12.30 ns
B29 WE
(0:3)/BS_B[0:3] negated to D(0:31),
DP(0:3) High-Z GPCM write access,
CSNT = 0, EBDF = 0
(MIN = 0.25 × B1 – 2.00)
5.60 — 4.30 — 3.00 — 1.80 — ns
B29a WE
(0:3)/BS_B[0:3] negated to D(0:31),
DP(0:3) High-Z GPCM write access, TRLX
= 0, CSNT = 1, EBDF = 0
(MIN = 0.50 × B1 – 2.00)
13.20 — 10.50 — 8.00 — 5.60 — ns
Table 9. Bus Operation Timings (continued)
Num Characteristic
33 MHz 40 MHz 50 MHz 66 MHz
Unit
Min Max Min Max Min Max Min Max