Datasheet

MPC852T PowerQUICC™ Hardware Specifications, Rev. 4
Freescale Semiconductor 55
CPM Electrical Characteristics
Figure 56. SPI Master (CP = 1) Timing Diagram
14.8 SPI Slave AC Electrical Specifications
Table 24 provides the SPI slave timings as shown in Figure 57 and Figure 58.
Table 24. SPI Slave Timing
Num Characteristic
All Frequencies
Unit
Min Max
170 Slave cycle time 2 — t
cyc
171 Slave enable lead time 15 — ns
172 Slave enable lag time 15 — ns
173 Slave clock (SPICLK) high or low time 1 — t
cyc
174 Slave sequential transfer delay (does not require deselect) 1 — t
cyc
175 Slave data setup time (inputs) 20 — ns
176 Slave data hold time (inputs) 20 — ns
177 Slave access time — 50 ns
SPIMOSI
(Output)
SPICLK
(CI=0)
(Output)
SPICLK
(CI=1)
(Output)
SPIMISO
(Input)
Data
166167161
161 160
msb lsb msb
msb Data lsb msb
167 166
163
166
167
165 164
162