Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller PLCC 44 (16.59x16.59) 8-Bit 33 MHz I/O number 32

Philips Semiconductors Product data

P80C3xX2; P80C5xX2;

P87C5xX2

80C51 8-bit microcontroller family

4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),

low power, high speed (30/33 MHz)

2003 Jan 24

SCON Address = 98H

Reset Value = 0000 0000B

SM0/FE SM1 SM2 REN TB8 RB8 Tl Rl

Bit Addressable

(SMOD0 = 0/1)*

Symbol Position Function

FE SCON.7 Framing Error bit. This bit is set by the receiver when an invalid stop bit is detected. The FE bit is not

cleared by valid frames but should be cleared by software. The SMOD0 bit must be set to enable

access to the FE bit.*

SM0 SCON.7 Serial Port Mode Bit 0, (SMOD0 must = 0 to access bit SM0)

SM1 SCON.6 Serial Port Mode Bit 1

SM2 SCON.5 Enables the Automatic Address Recognition feature in Modes 2 or 3. If SM2 = 1 then Rl will not be set

unless the received 9th data bit (RB8) is 1, indicating an address, and the received byte is a Given or

Broadcast Address. In Mode 1, if SM2 = 1 then Rl will not be activated unless a valid stop bit was

received, and the received byte is a Given or Broadcast Address. In Mode 0, SM2 should be 0.

REN SCON.4 Enables serial reception. Set by software to enable reception. Clear by software to disable reception.

TB8 SCON.3 The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by software as desired.

RB8 SCON.2 In modes 2 and 3, the 9th data bit that was received. In Mode 1, if SM2 = 0, RB8 is the stop bit that

was received.

In Mode 0, RB8 is not used.

Tl SCON.1 Transmit interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or at the beginning of

the stop bit in the other modes, in any serial transmission. Must be cleared by software.

Rl SCON.0 Receive interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or halfway through the

stop bit time in the other modes, in any serial reception (except see SM2). Must be cleared by

software.

NOTES:

*SMOD0 is located at PCON.6.

**f

OSC

= oscillator frequency

SU01628

76543210

SM0 SM1 Mode Description Baud Rate**

0 0 0 shift register f

OSC

/12 (12-clk mode) or f

OSC

/6 (6-clk mode)

0 1 1 8-bit UART variable

1 0 2 9-bit UART f

OSC

/64 or f

OSC

/32 or f

OSC

/16 (6-clock mode) or

OSC

/32 (12-clock mode)

1 1 3 9-bit UART variable

Figure 18. SCON: Serial Port Control Register