Datasheet

Philips Semiconductors Product data
P80C3xX2; P80C5xX2;
P87C5xX2
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),
low power, high speed (30/33 MHz)
2003 Jan 24
50
Table 9. EPROM Programming Modes
MODE RST PSEN ALE/PROG EA/V
PP
P2.7 P2.6 P3.7 P3.6 P3.3
Read signature 1 0 1 1 0 0 0 0 X
Program code data 1 0 0* V
PP
1 0 1 1 X
Verify code data 1 0 1 1 0 0 1 1 X
Pgm encryption table 1 0 0* V
PP
1 0 1 0 X
Pgm security bit 1 1 0 0* V
PP
1 1 1 1 X
Pgm security bit 2 1 0 0* V
PP
1 1 0 0 X
Pgm security bit 3 1 0 0* V
PP
0 1 0 1 X
Program to 6-clock mode 1 0 0* V
PP
0 0 1 0 0
Verify 6-clock
4
1 0 1 1 e 0 0 1 1
Verify security bits
5
1 0 1 1 e 0 1 0 X
NOTES:
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
PP
= 12.75 V ±0.25 V.
3. V
CC
= 5 V±10% during programming and verification.
4. Bit is output on P0.4 (1 = 12x, 0 = 6x).
5. Security bit one is output on P0.7.
Security bit two is output on P0.6.
Security bit three is output on P0.3.
* ALE/PROG
receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V
PP
is held at
12.75 V. Each programming pulse is low for 100 µs (±10 µs) and high for a minimum of 10 µs.
Table 10. Program Security Bits for EPROM Devices
PROGRAM LOCK BITS
1, 2
SB1 SB2 SB3 PROTECTION DESCRIPTION
1 U U U No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
2 P U U MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
3 P P U Same as 2, also verify is disabled.
4 P P P Same as 3, external execution is disabled. Internal data RAM is not accessible.
NOTES:
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.