PBSS4260PANP 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor 12 December 2012 Product data sheet 1. General description NPN/PNP low VCEsat Breakthrough In Small Signal (BISS) transistor in a leadless medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package. NPN/NPN complement: PBSS4260PAN. PNP/PNP complement: PBSS5260PAP. 2.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor Symbol Parameter Conditions Min Typ Max Unit collector-emitter saturation resistance IC = -1 A; IB = -100 mA; pulsed; - - 250 mΩ TR2 (PNP) RCEsat tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C 5. Pinning information Table 2.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor Symbol Parameter Conditions Min Max Unit VEBO emitter-base voltage open collector - 7 V IC collector current - 2 A ICM peak collector current - 3 A IB base current - 0.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor 1.5 006aad165 (1) Ptot (W) 1.0 (2) (3) (4) (5) 0.5 (6) (7) (8) 0 -75 -25 25 75 (1) 4-layer PCB 70 µm, mounting pad for collector 1 cm (2) FR4 PCB 70 µm, mounting pad for collector 1 cm (3) 4-layer PCB 70 µm, standard footprint Fig. 1.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor Symbol Parameter Conditions Min Typ Max Unit [1] - - 245 K/W [2] - - 160 K/W [3] - - 171 K/W [4] - - 130 K/W [5] - - 202 K/W [6] - - 120 K/W [7] - - 130 K/W [8] - - 63 K/W Per device Rth(j-a) thermal resistance from junction to ambient [1] [2] [3] [4] [5] [6] [7] [8] in free air Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprin
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor 006aad167 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.33 0.5 0.2 0.1 0.05 10 0.02 1 10-5 0.01 0 10-4 10-3 10-2 10-1 FR4 PCB 35 µm, mounting pad for collector 1 cm Fig. 3. 1 10 102 tp (s) 103 2 Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aad168 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.33 0.5 0.2 0.1 0.05 10 0.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor 006aad169 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.33 0.5 0.2 0.1 0.05 10 0.02 0.01 1 10-5 0 10-4 10-3 10-2 10-1 4-layer PCB 35 µm, mounting pad for collector 1 cm Fig. 5. 1 10 102 tp (s) 103 2 Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aac610 103 Zth(j-a) (K/W) duty cycle = 1 0.75 102 0.33 0.5 0.2 0.1 0.05 10 0.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor 006aac611 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.5 0.33 0.2 10 0.1 0.05 0.02 0 1 5 10 0.01 10- 4 10- 3 10- 2 10- 1 FR4 PCB 70 µm, mounting pad for collector 1 cm Fig. 7. 1 10 102 tp (s) 103 2 Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aad170 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.5 0.33 0.2 0.1 0.05 10 0.02 0.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor 102 006aad171 duty cycle = 1 0.75 0.5 Zth(j-a) (K/W) 0.33 0.2 10 0.1 0.05 0.02 0.01 0 1 10-5 10-4 10-3 10-2 10-1 4-layer PCB 70 µm, mounting pad for collector 1 cm Fig. 9. 1 102 10 tp (s) 103 2 Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 10. Characteristics Table 7.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor Symbol Parameter Conditions Min Typ Max Unit RCEsat collector-emitter saturation resistance IC = 1 A; IB = 100 mA; pulsed; - - 165 mΩ - - 1 V - - 1 V - - 1.1 V - - 1.2 V - - 0.9 V VBEsat tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C base-emitter saturation IC = 500 mA; IB = 50 mA; Tamb = 25 °C voltage IC = 1 A; IB = 50 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor Symbol Parameter Conditions Min Typ Max Unit IC = -2 A; IB = -200 mA; pulsed; - -365 -500 mV - - 250 mΩ - - -1 V - - -1 V - - -1.2 V - - -0.9 V tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C RCEsat VBEsat collector-emitter saturation resistance IC = -1 A; IB = -100 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor aaa-000083 800 hFE aaa-000113 3 (1) IB = 50 mA IC (A) 600 45 40 35 30 25 (2) 20 2 15 10 400 5 (3) 1 200 0 10-1 1 10 102 0 103 104 IC (mA) VCE = 2 V 0 1 2 3 4 VCE (V) 5 Tamb = 25 °C (1) Tamb = 100 °C Fig. 11. TR1 (NPN): Collector current as a function of collector-emitter voltage; typical values (2) Tamb = 25 °C (3) Tamb = −55 °C Fig. 10.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor aaa-000116 1 aaa-000117 102 VCEsat (V) VCEsat (V) 10 10-1 1 (1) (2) (3) 10-1 10-2 (1) (2) 10-2 10-3 10-1 1 10 102 10-3 10-1 103 104 IC (mA) (3) 1 IC/IB = 20 Tamb = 25 °C (1) Tamb = 100 °C (1) IC/IB = 100 (2) Tamb = 25 °C (2) IC/IB = 50 (3) Tamb = −55 °C (3) IC/IB = 10 102 10 103 104 IC (mA) Fig. 14. TR1 (NPN): Collector-emitter saturation voltage Fig. 15.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor aaa-000338 500 hFE (1) IB = -50 mA -45 -40 -35 IC (A) 400 -30 -25 -20 -2 (2) 300 aaa-000506 -3 -15 200 (3) -10 -5 -1 100 0 -10-1 -1 -10 -102 0 -103 -104 IC (mA) VCE = −2 V 0 -1 -2 -3 -4 VCE (V) -5 Tamb = 25 °C (1) Tamb = 100 °C Fig. 19. TR2 (PNP): Collector current as a function of collector-emitter voltage; typical values (2) Tamb = 25 °C (3) Tamb = −55 °C Fig. 18.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor aaa-000812 -10 aaa-000813 -10 VCEsat (V) VCEsat (V) -1 -1 -10-1 (2) -10-1 -10-2 -10-1 (1) (1) (2) (3) -1 -10 -10-2 -102 -10-3 -10-1 -103 -104 IC (mA) (3) -1 IC/IB = 20 Tamb = 25 °C (1) Tamb = 100 °C (1) IC/IB = 100 (2) Tamb = 25 °C (2) IC/IB = 50 (3) Tamb = −55 °C (3) IC/IB = 10 -102 -10 -103 -104 IC (mA) Fig. 22. TR2 (PNP): Collector-emitter saturation voltage Fig. 23.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor 11. Test information Fig. 26. TR1 (NPN): BISS transistor switching time definition Fig. 27. TR1 (NPN): Test circuit for switching times PBSS4260PANP Product data sheet All information provided in this document is subject to legal disclaimers. 12 December 2012 © NXP B.V. 2012.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor Fig. 28. TR2 (PNP): BISS transistor switching time definition Fig. 29. TR2 (PNP): Test circuit for switching times 11.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor 12. Package outline 2.1 1.9 0.65 max 1.1 0.9 0.77 0.57 (2×) 2.1 1.9 0.54 0.44 (2×) 0.04 max 3 4 1 6 0.65 (4×) 0.35 0.25 (6×) 0.3 0.2 Dimensions in mm 10-05-31 Fig. 30. Package outline DFN2020-6 (SOT1118) 13. Soldering 2.1 0.65 0.49 0.65 0.49 0.3 0.4 (6×) (6×) solder lands 0.875 solder paste 1.05 1.15 (2×) (2×) 2.25 solder resist 0.875 occupied area Dimensions in mm 0.35 (6×) 0.72 (2×) 0.45 (6×) 0.
PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 15.
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PBSS4260PANP NXP Semiconductors 60 V, 2 A NPN/PNP low VCEsat (BISS) transistor 16. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information .....................