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PBSS5260PAP

60 V, 2 A PNP/PNP low VCEsat (BISS) transistor

12 December 2012 Product data sheet

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1. General description

PNP/PNP low V

CEsat

Breakthrough In Small Signal (BISS) transistor in a leadless

medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package.

NPN/PNP complement: PBSS4260PANP. NPN/NPN complement: PBSS4260PAN.

2. Features and benefits

•

Very low collector-emitter saturation voltage V

CEsat

•

High collector current capability I

and I

•

High collector current gain h

at high I

•

Reduced Printed-Circuit Board (PCB) requirements

•

High efficiency due to less heat generation

•

AEC-Q101 qualified

3. Applications

•

Load switch

•

Battery-driven devices

•

Power management

•

Charging circuits

•

Power switches (e.g. motors, fans)

4. Quick reference data

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

Per transistor

CEO

collector-emitter

voltage

open base - - -60 V

collector current - - -2 A

peak collector current single pulse; t

≤ 1 ms - - -3 A

Per transistor

CEsat

collector-emitter

saturation resistance

= -1 A; I

= -100 mA; pulsed;

≤ 300 µs; δ ≤ 0.02 ; T

amb

= 25 °C

- - 250 mΩ

Summary of content (17 pages)

PAGE 1
PBSS5260PAP 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 12 December 2012 Product data sheet 1. General description PNP/PNP low VCEsat Breakthrough In Small Signal (BISS) transistor in a leadless medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package. NPN/PNP complement: PBSS4260PANP. NPN/NPN complement: PBSS4260PAN. 2.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 E1 emitter TR1 2 B1 base TR1 3 C2 collector TR2 4 E2 emitter TR2 5 B2 base TR2 6 C1 collector TR1 7 C1 collector TR1 8 C2 collector TR2 Simplified outline 6 5 7 1 Graphic symbol 4 8 2 3 Transparent top view C1 B2 E2 TR2 TR1 E1 B1 C2 sym138 DFN2020-6 (SOT1118) 6. Ordering information Table 3.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor Symbol Parameter Conditions Min Max Unit IBM peak base current single pulse; tp ≤ 1 ms - -1 A Ptot total power dissipation Tamb ≤ 25 °C [1] - 370 mW [2] - 570 mW [3] - 530 mW [4] - 700 mW [5] - 450 mW [6] - 760 mW [7] - 700 mW [8] - 1450 mW [1] - 510 mW [2] - 780 mW [3] - 730 mW [4] - 960 mW [5] - 620 mW [6] - 1040 mW [7] - 960 mW [8] - 2000 mW Per de
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 1.5 006aad165 (1) Ptot (W) 1.0 (2) (3) (4) (5) 0.5 (6) (7) (8) 0 -75 -25 25 75 (1) 4-layer PCB 70 µm, mounting pad for collector 1 cm (2) FR4 PCB 70 µm, mounting pad for collector 1 cm (3) 4-layer PCB 70 µm, standard footprint Fig. 1.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor Symbol Parameter Conditions Min Typ Max Unit [1] - - 245 K/W [2] - - 160 K/W [3] - - 171 K/W [4] - - 130 K/W [5] - - 202 K/W [6] - - 120 K/W [7] - - 130 K/W [8] - - 63 K/W Per device Rth(j-a) thermal resistance from junction to ambient [1] [2] [3] [4] [5] [6] [7] [8] in free air Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 006aad167 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.33 0.5 0.2 0.1 0.05 10 0.02 1 10-5 0.01 0 10-4 10-3 10-2 10-1 FR4 PCB 35 µm, mounting pad for collector 1 cm Fig. 3. 1 10 102 tp (s) 103 2 Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aad168 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.33 0.5 0.2 0.1 0.05 10 0.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 006aad169 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.33 0.5 0.2 0.1 0.05 10 0.02 0.01 1 10-5 0 10-4 10-3 10-2 10-1 4-layer PCB 35 µm, mounting pad for collector 1 cm Fig. 5. 1 10 102 tp (s) 103 2 Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aac610 103 Zth(j-a) (K/W) duty cycle = 1 0.75 102 0.33 0.5 0.2 0.1 0.05 10 0.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 006aac611 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.5 0.33 0.2 10 0.1 0.05 0.02 0 1 5 10 0.01 10- 4 10- 3 10- 2 10- 1 FR4 PCB 70 µm, mounting pad for collector 1 cm Fig. 7. 1 10 102 tp (s) 103 2 Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aad170 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.5 0.33 0.2 0.1 0.05 10 0.02 0.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 102 006aad171 duty cycle = 1 0.75 0.5 Zth(j-a) (K/W) 0.33 0.2 10 0.1 0.05 0.02 0.01 0 1 10-5 10-4 10-3 10-2 10-1 4-layer PCB 70 µm, mounting pad for collector 1 cm Fig. 9. 1 102 10 tp (s) 103 2 Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 10. Characteristics Table 7.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor Symbol Parameter Conditions Min Typ Max Unit RCEsat collector-emitter saturation resistance IC = -1 A; IB = -100 mA; pulsed; - - 250 mΩ - - -1 V - - -1 V - - -1.2 V - - -0.9 V tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C base-emitter saturation IC = -500 mA; IB = -50 mA; voltage Tamb = 25 °C VBEsat IC = -1 A; IB = -50 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor aaa-000513 -1.2 aaa-000529 -1.2 VBEsat (V) VBE (V) -1.0 (1) -0.8 (1) -0.8 (2) (2) -0.6 -0.4 (3) (3) -0.4 0.0 -10-1 -1 -10 -102 -0.2 -10-1 -103 -104 IC (mA) -1 -10 VCE = −2 V IC/IB = 20 (1) Tamb = −55 °C (1) Tamb = −55 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = 100 °C (3) Tamb = 100 °C Fig. 12.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor aaa-000814 103 aaa-000815 103 RCEsat (Ω) RCEsat (Ω) 102 102 10 10 (1) (1) (2) (3) 1 (2) 1 (3) 10-1 -10-1 -1 -10 -102 10-1 -10-1 -103 -104 IC (mA) -1 IC/IB = 20 Tamb = 25 °C (1) Tamb = 100 °C (1) IC/IB = 100 (2) Tamb = 25 °C (2) IC/IB = 50 (3) Tamb = −55 °C (3) IC/IB= 10 Fig. 16.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 11. Test information - IB input pulse (idealized waveform) 90 % - I Bon (100 %) 10 % - I Boff output pulse (idealized waveform) - IC 90 % - I C (100 %) 10 % t td ts tr t on tf t off 006aaa266 Fig. 18. BISS transistor switching time definition VBB RB (probe) oscilloscope 450 Ω VCC RC Vo (probe) 450 Ω R2 VI oscilloscope DUT R1 mgd624 Fig. 19. Test circuit for switching times 11.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 12. Package outline 2.1 1.9 0.65 max 1.1 0.9 0.77 0.57 (2×) 2.1 1.9 0.54 0.44 (2×) 0.04 max 3 4 1 6 0.65 (4×) 0.35 0.25 (6×) 0.3 0.2 Dimensions in mm 10-05-31 Fig. 20. Package outline DFN2020-6 (SOT1118) 13. Soldering 2.1 0.65 0.49 0.65 0.49 0.3 0.4 (6×) (6×) solder lands 0.875 solder paste 1.05 1.15 (2×) (2×) 2.25 solder resist 0.875 occupied area Dimensions in mm 0.35 (6×) 0.72 (2×) 0.45 (6×) 0.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 15.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations.
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PBSS5260PAP NXP Semiconductors 60 V, 2 A PNP/PNP low VCEsat (BISS) transistor 16. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ......................