PCA8534A Automotive LCD driver for low multiplex rates Rev. 3 — 25 July 2011 Product data sheet 1. General description The PCA8534A is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD)1 with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 60 segments. It can be easily cascaded for larger LCD applications.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 3. Ordering information Table 1. Ordering information Type number Package Name Description Delivery form Version PCA8534AH/Q900/1 LQFP80 plastic low profile quad flat package; tape and reel 80 leads; body 12 12 1.4 mm SOT315-1 4. Marking Table 2. Marking codes Type number Marking code PCA8534AH/Q900/1 PCA8534A/Q900 5.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 6. Pinning information 61 S11 62 S12 63 S13 64 S14 65 S15 66 S16 67 S17 68 S18 69 S19 70 S20 71 S21 72 S22 73 S23 74 S24 75 S25 76 S26 77 S27 78 S28 79 S29 80 S30 6.1 Pinning S31 1 60 S10 S32 2 59 S9 S33 3 58 S8 S34 4 57 S7 S35 5 56 S6 S36 6 55 S5 S37 7 54 S4 S38 8 53 S3 S39 9 52 S2 S40 10 51 S1 PCA8534AH S41 11 50 S0 CLK 40 SCL 39 SDA 38 n.c. 37 n.c. 36 n.c. 35 n.c.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 6.2 Pin description Table 3. PCA8534A Product data sheet Pin description Symbol Pin Type Description S31 to S59 1 to 29 output LCD segment output 31 to 59 BP0 to BP3 30 to 33 output LCD backplane output 0 to 3 n.c.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 7. Functional description The PCA8534A is a versatile peripheral device designed to interface between any microcontroller to a wide variety of LCD segment or dot matrix displays (see Figure 3). It can directly drive any static or multiplexed LCD containing up to four backplanes and up to 60 segments. The display configurations possible with the PCA8534A depend on the required number of active backplane outputs.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates VDD R≤ tr 2Cb VDD VLCD 60 segment drives SDA HOST MICROPROCESSOR/ MICROCONTROLLER LCD PANEL SCL PCA8534A 4 backplanes OSC A0 A1 A2 (up to 240 elements) SA0 VSS 013aaa270 VSS Fig 4. Typical system configuration The host microcontroller maintains the 2-line I2C-bus communication channel with the PCA8534A.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 7.3 LCD voltage selector The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the selected LCD drive configuration. The operation of the voltage selector is controlled by the mode-set command from the command decoder.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates V on RMS D = ---------------------- = V off RMS 2 a + 2a + n --------------------------2 a – 2a + n (3) Using Equation 3, the discrimination for an LCD drive mode of 1:3 multiplex with 1⁄ 2 bias is 1⁄ 2 21 bias is ---------- = 1.528 . 3 3 = 1.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 100 % Relative Transmission 90 % 10 % Vth(off) OFF SEGMENT Vth(on) GREY SEGMENT VRMS [V] ON SEGMENT 013aaa494 Fig 5. PCA8534A Product data sheet Electro-optical characteristic: relative transmission curve of the liquid All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 July 2011 © NXP B.V. 2011. All rights reserved.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 7.4 LCD drive mode waveforms 7.4.1 Static drive mode The static LCD drive mode is used when a single backplane is provided in the LCD. Backplane and segment drive waveforms for this mode are shown in Figure 6. Tfr LCD segments VLCD BP0 VSS state 1 (on) VLCD state 2 (off) Sn VSS VLCD Sn+1 VSS (a) Waveforms at driver. VLCD state 1 0V −VLCD VLCD state 2 0V −VLCD (b) Resultant waveforms at LCD segment.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 7.4.2 1:2 Multiplex drive mode When two backplanes are provided in the LCD, the 1:2 multiplex mode applies. The PCA8534A allows the use of 1⁄2 bias or 1⁄3 bias in this mode as shown in Figure 7 and Figure 8. Tfr VLCD BP0 LCD segments VLCD/2 VSS state 1 VLCD BP1 state 2 VLCD/2 VSS VLCD Sn VSS VLCD Sn+1 VSS (a) Waveforms at driver.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates Tfr BP0 BP1 Sn Sn+1 VLCD 2VLCD/3 LCD segments VLCD/3 VSS state 1 VLCD 2VLCD/3 state 2 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS (a) Waveforms at driver. VLCD 2VLCD/3 VLCD/3 state 1 0V −VLCD/3 −2VLCD/3 −VLCD VLCD 2VLCD/3 VLCD/3 state 2 0V −VLCD/3 −2VLCD/3 −VLCD (b) Resultant waveforms at LCD segment. 013aaa209 Vstate1(t) = VSn(t) VBP0(t). Von(RMS) = 0.745VLCD. Vstate2(t) = VSn(t) VBP1(t).
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 7.4.3 1:3 Multiplex drive mode When three backplanes are provided in the LCD, the 1:3 multiplex drive mode applies, as shown in Figure 9. Tfr BP0 BP1 BP2 Sn Sn+1 Sn+2 VLCD 2VLCD/3 LCD segments VLCD/3 VSS state 1 VLCD 2VLCD/3 state 2 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS VLCD 2VLCD/3 VLCD/3 VSS (a) Waveforms at driver.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 7.4.4 1:4 Multiplex drive mode When four backplanes are provided in the LCD, the 1:4 multiplex drive mode applies, as shown in Figure 10.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 7.5 Oscillator The internal logic and the LCD drive signals of the PCA8534A are timed by the frequency fclk. It equals either the built-in oscillator frequency fosc or the external clock frequency fclk(ext). The clock frequency fclk determines the LCD frame frequency (ffr). 7.5.1 Internal clock The internal oscillator is enabled by connecting pin OSC to pin VSS.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 7.9 Backplane outputs The LCD drive section includes four backplane outputs BP0 to BP3 which must be connected directly to the LCD. The backplane output signals are generated in accordance with the selected LCD drive mode. • In 1:4 multiplex drive mode: BP0 to BP3 must be connected directly to the LCD. If less than four backplane outputs are required, the unused outputs can be left open-circuit.
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx Sn+2 Sn+3 static display RAM filling order b f Sn+1 BP0 rows display RAM 0 rows/backplane 1 outputs (
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates When display data is transmitted to the PCA8534A, the display bytes received are stored in the display RAM in accordance with the selected LCD multiplex drive mode. The data is stored as it arrives and depending on the current multiplex drive mode, data is stored singularly, in pairs, triples, or quadruples. To illustrate the filling order, an example of a 7-segment display showing all drive modes is given in Figure 12.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates In cascaded applications each PCA8534A in the cascade must be addressed separately. Initially, the first PCA8534A is selected by sending the device-select command matching the first hardware subaddress. Then the data pointer is set to the preferred display RAM address by sending the load-data-pointer command.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates • In the first write to the RAM, bits a7 to a0 are written. • In the second write, bits b7 to b0 are written, overwriting bits a1 and a0 with bits b7 and b6. • In the third write, bits c7 to c0 are written, overwriting bits b1 and b0 with bits c7 and c6. Depending on the method of writing to the RAM (standard or entire filling by rewriting), some elements remain unused or can be used.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates Table 9. Blink frequencies Blink mode Operating mode ratio Blink frequency with respect to fclk (typical) Unit fclk = 1536 Hz off f clk f blink = -------768 1 f clk f blink = ----------1536 2 f clk f blink = ----------3072 3 blinking off Hz 2 Hz 1 Hz 0.5 Hz An additional feature is for an arbitrary selection of LCD segments to blink.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates Table 11. Mode-set command bit description Bit Symbol Value Description 7 to 4 - 1100 fixed value 3 E 2 display status 0[1] disabled (blank)[2] 1 enable LCD bias configuration[3] B 1 to 0 0[1] 1⁄ 3 bias 1 1⁄ 2 bias M[1:0] LCD drive mode selection 01 static; one backplane 10 1:2 multiplex; two backplanes 11 1:3 multiplex; three backplanes 00[1] 1:4 multiplex; four backplanes [1] Default value.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates Table 14. Bank-select command bit description See Section 7.10.4 on page 20.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 8. Characteristics of the I2C-bus The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial DAta Line (SDA) and a Serial CLock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates MASTER TRANSMITTER/ RECEIVER SLAVE TRANSMITTER/ RECEIVER SLAVE RECEIVER MASTER TRANSMITTER/ RECEIVER MASTER TRANSMITTER SDA SCL mga807 Fig 15. System configuration 8.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of 8 bits is followed by an acknowledge cycle.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 8.5 I2C-bus controller The PCA8534A acts as an I2C-bus slave receiver. It does not initiate I2C-bus transfers or transmit data to an I2C-bus master receiver. The only data output from the PCA8534A are the acknowledge signals of the selected devices. Device selection depends on the I2C-bus slave address, on the transferred command data and on the hardware subaddress.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates R/W = 0 slave address control byte RAM/command byte S C R S 0 1 1 1 0 0 A 0 A O S 0 M A S B L S P B EXAMPLES a) transmit two bytes of RAM data S S 0 1 1 1 0 0 A 0 A 0 1 0 RAM DATA A RAM DATA A A COMMAND A 0 0 A COMMAND A P A COMMAND A 0 1 A RAM DATA A A P b) transmit two command bytes S S 0 1 1 1 0 0 A 0 A 1 0 0 c) transmit one command byte and two RAM date bytes S S 0 1 1 1 0 0 A 0 A 1 0 0 RAM DATA A P m
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates The acknowledgement after each byte is made only by the (A0, A1 and A2) addressed PCA8534A. After the last display byte, the I2C-bus master issues a STOP condition (P). Alternatively a START may be issued to RESTART I2C-bus access. 9.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 10. Limiting values CAUTION Static voltages across the liquid crystal display can build up when the LCD supply voltage (VLCD) is on while the IC supply voltage (VDD) is off, or vice versa. This may cause unwanted display artifacts. To avoid such artifacts, VLCD and VDD must be applied or removed together. Table 18. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 11. Static characteristics Table 19. Static characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Supplies VDD supply voltage 1.8 - 5.5 V VLCD LCD supply voltage 2.5 - 6.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates Table 19. Static characteristics …continued VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 100 - +100 mV - 1.5 10 k 100 - +100 mV - 6.0 13.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 001aan352 20 IDD(LCD) (μA) 16 12 8 4 0 3 4 5 6 7 VLCD (V) Tamb = 30 C; 1:4 multiplex; fclk(ext) = 1.536 kHz; all RAM written with logic 1; no display connected. Fig 21. Typical IDD(LCD) with respect to VLCD PCA8534A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 25 July 2011 © NXP B.V. 2011. All rights reserved.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 12. Dynamic characteristics Table 20. Dynamic characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 1 / fclk tclk(H) tclk(L) 0.7VDD CLK 0.3VDD 0.7VDD SYNC 0.3VDD tPD(SYNC_N) tPD(SYNC_N) tSYNC_NL 0.5 V BP0 to BP3, and S0 to S59 (VDD = 5 V) 0.5 V tPD(drv) 001aah618 Fig 22. Driver timing waveforms SDA tBUF tLOW tf SCL tHD;STA tr tHD;DAT tHIGH tSU;DAT SDA tSU;STA tSU;STO mga728 Fig 23.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 13. Application information 13.1 Cascaded operation Large display configurations of up to 16 PCA8534A can be recognized on the same I2C-bus by using the 3-bit hardware subaddress (A0, A1, and A2) and the programmable I2C-bus slave address (SA0). Table 21.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates VDD VLCD SDA 60 segment drives SCL SYNC PCA8534A CLK BP0 to BP3 (open-circuit) OSC A0 A1 SA0 VSS A2 LCD PANEL VLCD VDD R≤ HOST MICROPROCESSOR/ MICROCONTROLLER tr 2Cb VDD VLCD 60 segment drives SDA SCL SYNC PCA8534A 4 backplanes CLK BP0 to BP3 OSC A0 VSS A1 A2 SA0 VSS 013aaa271 (1) Is master (OSC connected to VSS). (2) Is slave (OSC connected to VDD). Fig 24.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates Table 22. SYNC contact resistance Number of devices Maximum contact resistance 2 6000 3 to 5 2200 6 to 10 1200 11 to 16 700 The PCA8534A can always be cascaded with other devices of the same type or conditionally with other devices of the same family. This allows optimal drive selection for a given number of pixels to display. Figure 22 and Figure 25 show the timing of the synchronization signals.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates If an external clock source is used, all PCA8534A in the cascade must be configured such as to receive the clock from that external source (pin OSC connected to VDD). It must be ensured that the clock tree is designed such that on all PCA8534A the clock propagation delay from the clock source to all PCA8534A in the cascade is as equal as possible since otherwise synchronization artifacts may occur.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 15. Package outline LQFP80: plastic low profile quad flat package; 80 leads; body 12 x 12 x 1.4 mm SOT315-1 c y X A 60 41 40 Z E 61 e E HE A A2 (A 3) A1 w M θ bp Lp L pin 1 index 80 21 detail X 20 1 ZD e v M A w M bp D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.6 0.16 0.04 1.5 1.3 0.25 0.27 0.13 0.18 0.12 12.1 11.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 16. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that all normal precautions are taken as described in JESD625-A, IEC 61340-5 or equivalent standards. 17. Soldering of SMD packages This text provides a very brief insight into a complex technology.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 17.3 Wave soldering Key characteristics in wave soldering are: • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 17.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 27. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 18. Abbreviations Table 25.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 19.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 21. Legal information 21.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 21.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus — logo is a trademark of NXP B.V. 22.
PCA8534A NXP Semiconductors Automotive LCD driver for low multiplex rates 23. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.