Datasheet

PCA9306 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet Rev. 8 — 22 January 2014 2 of 35
NXP Semiconductors
PCA9306
Dual bidirectional I
2
C-bus and SMBus voltage-level translator
All channels have the same electrical characteristics and there is minimal deviation from
one output to another in voltage or propagation delay. This is a benefit over discrete
transistor voltage translation solutions, since the fabrication of the switch is symmetrical.
The translator provides excellent ESD protection to lower voltage devices, and at the
same time protects less ESD-resistant devices.
2. Features and benefits
 2-bit bidirectional translator for SDA and SCL lines in mixed-mode I
2
C-bus applications
 Standard-mode, Fast-mode, and Fast-mode Plus I
2
C-bus and SMBus compatible
 Less than 1.5 ns maximum propagation delay to accommodate Standard-mode and
Fast-mode I
2
C-bus devices and multiple masters
 Allows voltage level translation between:
 1.0 V V
ref(1)
and 1.8 V, 2.5 V, 3.3 V or 5 V V
bias(ref)(2)
 1.2 V V
ref(1)
and 1.8 V, 2.5 V, 3.3 V or 5 V V
bias(ref)(2)
 1.8 V V
ref(1)
and 3.3 V or 5 V V
bias(ref)(2)
 2.5 V V
ref(1)
and 5 V V
bias(ref)(2)
 3.3 V V
ref(1)
and 5 V V
bias(ref)(2)
 Provides bidirectional voltage translation with no direction pin
 Low 3.5  ON-state connection between input and output ports provides less signal
distortion
 Open-drain I
2
C-bus I/O ports (SCL1, SDA1, SCL2 and SDA2)
 5V tolerant I
2
C-bus I/O ports to support mixed-mode signal operation
 High-impedance SCL1, SDA1, SCL2 and SDA2 pins for EN = LOW
 Lock-up free operation
 Flow through pinout for ease of printed-circuit board trace routing
 ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
 Packages offered: SO8, TSSOP8, VSSOP8, XQFN8, XSON8, XSON8U