INTEGRATED CIRCUITS PCA9564 Parallel bus to I2C-bus controller Product data sheet Supersedes data of 2004 Jun 25 Philips Semiconductors 2006 Sep 01
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 DESCRIPTION The PCA9564 is an integrated circuit designed in CMOS technology that serves as an interface between most standard parallel-bus microcontrollers/microprocessors and the serial I2C-bus and allows the parallel bus system to communicate bi-directionally with the I2C-bus. The PCA9564 can operate as a master or a slave and can be a transmitter or receiver.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 16 SDA 17 VDD 18 D0 19 D1 PIN CONFIGURATION — HVQFN 20 D2 PIN CONFIGURATION — DIP, SO, TSSOP D0 1 20 VDD D1 2 19 SDA D2 3 18 SCL D3 1 15 SCL D3 4 17 RESET D4 2 14 RESET D4 5 16 INT D5 3 D5 6 15 A1 D6 4 12 A1 D6 7 14 A0 D7 8 13 CE D7 5 11 A0 DNU 9 12 RD 7 8 9 WR RD CE 10 6 VSS 11 WR DNU VSS 10 13 INT TOP VIEW SW02261 SW02260 PIN DESCRIPTION PIN NUMBER DIP, SO, T
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 DATA D7 D6 D5 D4 D3 D2 D1 D0 PCA9564 SDA BUS BUFFER FILTER SDA CONTROL SD7 SD6 SD5 SD4 SD3 SD2 SD1 A1 A0 0 1 0 0 1 0 0 0 1 1 SD0 I2CDAT – DATA REGISTER – READ/WRITE TE TO6 AA ENSIO STA STO SI TO5 TO4 TO3 TO2 TO1 TO0 I2CTO – TIMEOUT REGISTER – WRITE ONLY FILTER SCL BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 I2CADR – OWN ADDRESS – READ/WRITE SCL CONTROL ST7 ST6 ST5 ST
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 The Address Register, I2CADR: I2CADR is not affected by the SIO hardware. The contents of this register are irrelevant when SIO is in a master mode. In the slave modes, the seven most significant bits must be loaded with the microcontroller’s own slave address. FUNCTIONAL DESCRIPTION General The PCA9564 acts as an interface device between standard high-speed parallel buses and the serial I2C-bus.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 release the PCA9564 from the I2C-bus since, when ENSIO is reset, the I2C-bus status is lost. The AA flag should be used instead (see description of the AA flag in the following text). – A data byte has been received while SIO is in the addressed slave receiver mode – “Own slave address” has been received In the following text, it is assumed that ENSIO = “1”.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 Master Receiver Mode: In the master receiver mode, a number of data bytes are received from a slave transmitter (see Figure 3). The transfer is initialized as in the master transmitter mode. When the start condition has been transmitted, the interrupt service routine must load I2CDAT with the 7-bit slave address and the data direction bit (SLA+R).
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 MT SUCCESSFUL TRANSMISSION TO A SLAVE RECEIVER ÇÇÇÇÇÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇÇÇÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇÇÇÇÇ ÇÇÇÇÇÇÇ ÇÇÇÇÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ S SLA W A 08H DATA A P 28H 18H NEXT TRANSFER STARTED WITH A REPEATED START CONDITION F8 S SLA W 10H NOT ACKNOWLEDGE RECEIVED AFTER THE SLAVE ADDRESS A P 20H F8H R NOT ACKNOWLEDGE RECEIVED AFTER A DATA BYTE A 30H ARBITRATION LOST IN SLAVE ADDRESS OR DATA B
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 MR ÇÇÇÇÇÇÇÇ ÇÇÇÇÇÇÇÇ SUCCESSFUL RECEPTION FROM A SLAVE TRANSMITTER S SLA 08H R ÇÇÇ ÇÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇÇÇÇÇ ÇÇÇÇÇÇÇ ÇÇÇÇÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ A DATA DATA 50H 40H NEXT TRANSFER STARTED WITH A REPEATED START CONDITION A A P 58H F8H S SLA R 10H NOT ACKNOWLEDGE RECEIVED AFTER THE SLAVE ADDRESS A 48H ARBITRATION LOST IN SLAVE ADDRESS OR ACKNOWLEDGE BIT A or A P W F8H OTHER MST CONTIN
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 ÇÇÇÇÇÇÇ ÇÇÇ ÇÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇÇÇÇÇ ÇÇÇ ÇÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ RECEPTION OF THE OWN SLAVE ADDRESS AND ONE OR MORE DATA BYTES ALL ARE ACKNOWLEDGED.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller Table 2.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller Table 3.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller Table 4.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller Table 5. STATUS CODE (I2CSTA) A8H B0H B8H C0H C8H Table 6.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 I2CSTA = 90H: This status code indicates that the SCL line is stuck LOW. Slave Transmitter Mode: In the slave transmitter mode, a number of data bytes are transmitted to a master receiver (see Figure 5). Data transfer is initialized as in the slave receiver mode.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 TIME OUT STA FLAG SDA LINE SCL LINE START CONDITION SU00976 Figure 7. Forced access to a busy I2C-bus • I2C BUS OBSTRUCTED BY A LOW LEVEL ON SCL OR SDA microcontroller reads the status register, it needs to send an external reset signal in order to reset the SIO. I2C-bus hang-up occurs if SDA or SCL is pulled LOW by an An uncontrolled source.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 I2C-BUS TIMING DIAGRAMS The diagrams (Figures 9 to 12) illustrate typical timing diagrams for the PCA9564 in master/slave functions. SCL SDA INT interrupt 7-bit address first-byte interrupt nbyte interrupt R/W = 0 ACK START condition ACK ACK STOP condition from slave receiver Master PCA9564 writes data to slave transmitter. su01490 Figure 9.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 SCL SDA INT interrupt 7-bit address first-byte nbyte interrupt interrupt R/W = 1 ACK START condition ACK STOP condition no ACK from master receiver from slave PCA9564 su01492 External master receiver reads data from PCA9564. Figure 11.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 VDD ADDRESS BUS VDD VDD A0 A1 PCA9564 DECODER SLAVE INT ALE RESET CE SCL 80C51 8 D[0:7] RD SDA WR VDD INT VDD RESET VSS VSS SD00705 Figure 13.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 SPECIFIC APPLICATIONS PCA8584 MIGRATION PATH The PCA9564 is a parallel bus to I2C bus controller that is designed to allow “smart” devices to interface with I2C or SMBus components, where the “smart” device does not have an integrated I2C port and the designer does not want to “bit-bang” the I2C port.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134) MIN MAX UNIT Supply voltage PARAMETER –0.3 4.6 V VI Voltage range (any input) –0.8 6.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 SDA tLOW tF tF tSU;DAT tR tHD;STA tR tSP tBUF SCL S tHD;STA tSU;STA tHD;DAT tHIGH tSU;STO SR P S SU01755 Figure 18. Definition of timing I2C-BUS TIMING SPECIFICATIONS All the timing limits are valid within the operating supply voltage and ambient temperature range; VDD = 2.5 V ± 0.2 V and 3.3 V ± 0.3 V, Tamb = –40 to +85 °C; and refer to VIL and VIH with an input voltage of VSS to VDD.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 START ACK OR READ CYCLE SCL SDA 30% tRES RESET 50% 50% 50% tREC tWRES tRES 50% Dn LED OFF SW02107 Figure 19. Reset timing A0–A1 tAS tAH CE tCH tCS tRW tRWD RD tDD D0–D7 (READ) FLOAT tDF NOT VALID VALID FLOAT tRWD WR tDS tDH D0–D7 (WRITE) VALID SD00711 Figure 20.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 AC CHARACTERISTICS (3.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 AC CHARACTERISTICS (2.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller RD, CE INPUT PCA9564 VI VM VM GND tDF(LZ) tDD(ZL) Dn OUTPUT LOW-TO-FLOAT FLOAT-TO-LOW VCC VM VX VOL tDD(ZH) tDF(HZ) Dn OUTPUT HIGH-TO-FLOAT FLOAT-TO-HIGH VOH VY VM GND OUTPUTS FLOATING OUTPUTS ENABLED OUTPUTS ENABLED VM = 1.5 V VX = VOL + 0.3 V VY = VOH – 0.3 V VOL AND VOH ARE TYPICAL OUTPUT VOLTAGE DROPS THAT OCCUR WITH THE OUTPUT LOAD. SW02113 Figure 21. tDD and tDF times VCC 6.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 DIP20: plastic dual in-line package; 20 leads (300 mil) 2006 Sep 01 27 SOT146-1
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 SO20: plastic small outline package; 20 leads; body width 7.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 HVQFN20: plastic thermal enhanced very thin quad flat package; no leads; 20 terminals; body 5 x 5 x 0.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 REVISION HISTORY Rev Date Description _4 20060901 Product data sheet. Supersedes data of 2004 Jun 25 (9397 750 13272). • Ordering information table on page 2: added whole wafer package option (PCA9564U). • Pin description table on page 3: added table note 1 and its reference at HVQFN pin 7 (VSS). • Section “The Control Register, I2CCON” on page 5: 3rd sentence re-written.
Philips Semiconductors Product data sheet Parallel bus to I2C-bus controller PCA9564 Legal Information Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
