PCA9629 Fm+ I2C-bus stepper motor controller Rev. 1 — 29 February 2012 Product data sheet 1. General description The PCA9629 is an I2C-bus controlled low-power CMOS device that provides all the logic and control required to drive a four phase stepper motor. PCA9629 is intended to be used with external high current drivers to drive the motor coils. The PCA9629 supports three stepper motor drive formats: one-phase (wave drive), two-phase, and half-step.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller Four general purpose I/Os: Configured to sense logic level outputs from optical interrupter photo transistor circuit Configured as outputs to drive (source/sink) LEDs or other loads up to 25 mA Programmable interrupt Mask Control for input pins 4.5 V to 5.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 5.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 6. Pinning information 6.1 Pinning P0 1 16 VDD P1 2 15 SDA P2 3 14 SCL P3 4 AD0 5 AD1 6 11 OUT1 RESET 7 10 OUT2 VSS 8 PCA9629PW 13 INT 12 OUT0 9 OUT3 002aad903 Fig 2. Pin configuration for TSSOP16 6.2 Pin description Table 3.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7. Functional description Refer to Figure 1 “PCA9629 block diagram”. 7.1 Device address Following a START condition, the bus master must send the target slave address followed by a read or write operation. The slave address of the PCA9629 is shown in Figure 3. Slave address pins AD1 and AD0 choose one of 16 slave addresses. To conserve power, no internal pull-up resistors are incorporated on AD1 and AD0.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.2 Command register Following the successful acknowledgement of the slave address and a write bit, the bus master sends a byte to the PCA9629. This byte is stored in the Command register. AI - D5 D4 D3 D2 D1 D0 1 0 0 0 0 0 0 0 default at power-up or after RESET register number Auto-Increment Fig 4.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller Table 5.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.1 MODE — Mode register Table 6. MODE - Mode register (address 00h) bit description Legend: * default value.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.2 SUBADR1 to SUBADR3 — I2C-bus subaddress 1 to 3 SUBADR1 to SUBADR3 - I2C-bus subaddress registers 1 to 3 (addresses 01h, 02h 03h) bit description Legend: * default value. Table 7.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.4 Watchdog timer The purpose of the watchdog timer is to recover the PCA9629 if the system it is used in enters an erroneous state. When the timer times out, the watchdog generates an interrupt to the host controller and, if programmed for reset, resets PCA9629 if the user program fails to ‘feed’ the watchdog.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.4.2 WDCNTL — WatchDog Control register Table 10. WDMOD - Watchdog control register (address 06h) bit description Legend: * default value. Address Register Bit Access Value Description 06h WDCNTL 7:5 read only 000* Reserved. 4 write only 1 Clear WDINT flag. 0* Read value. 1 WDINT: watchdog interrupt flag set.[1] 0* WDINT: watchdog interrupt flag not set. 1 WDRST: watchdog reset flag.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.5 GPIOs and interrupts 7.3.5.1 IP — Input Port register This register is read-only. They reflect the incoming logic levels of the port pins P0 to P3, regardless of whether the pin is defined as an input or an output by the I/O configuration register. Writes to this register have no effect. Table 11. IP - Input Port register (address 07h) bit description Legend: * default value ‘X’ is determined by the externally applied logic level. 7.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.5.4 IOC — I/O Configuration register The lower four bits of this register configures the direction of the I/O pins P0 to P3. If a bit in [3:0] is set (written with logic 1), the corresponding port pin is enabled as an input with high-impedance output driver. If the bit is cleared (written with logic 0), the corresponding port pin is enabled as an output. At reset, the device’s ports P0 to P3 are inputs. Table 14.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.5.6 CLRINT — Clear Interrupts register Interrupt flags can be cleared by bits [3:0] when set to logic 1. Table 16. CLRINT - Clear interrupts register (address 0Ch) bit description Legend: * default value.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller CLRINT[0] 1 Q MSK[0] RISING EDGE DETECTOR P0 WATCHDOG TIMER WDRST WDINT IOC[0] D MODE[5] INTMODE FALLING EDGE DETECTOR INT CLRINT[3] 1 IOC[3] D Q MSK[3] RISING EDGE DETECTOR P3 INTMODE FALLING EDGE DETECTOR Fig 6. 002aaf870 PCA9629 interrupt logic 7.3.6 Interrupt based motor control Interrupt mechanisms from GPIOs 0 and 1 (INTP0 and INTP1) can be used to control the motor operation.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.6.1 INT_ACT_SETUP — Interrupt Action Setup control register Table 18. INT_ACT_SETUP - Interrupt action setup control register (address 0Eh) bit description Legend: * default value.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.6.3 INT_ES_SETUP — Interrupt Extra Steps Setup control register Table 20. INT_ES_SETUP - Interrupt extra steps setup control register (address 10h) bit description Legend: * default value.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller Example: This example assumes that two position sensors are located spaced apart and a drive mechanism is needed to move an object back and forth between these two sensors. Figure 7 shows this application use case. Driving the stepper motor causes movement of the object toward one of the sensors. Logic level output of one sensor is connected to input pin P0 and the other to P1. P0 and P1 are configured as inputs. 3.3 V 5V 1.6 kΩ 1.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.7 SETMODE — output state on STOP control register This register determines the condition of motor output pins when STOPPED, one of logic 0 or Hold (last state). Table 22. SETMODE - Output state on STOP control register (address 12h) bit description Legend: * default value.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.10 CWPWL, CWPWH — Clockwise step pulse width register This register determines the step pulse width used for the phase sequence output waveforms during ClockWise (CW) rotation. Table 25. CWPWL, CWPWH - Clockwise step pulse width control register (address 16h, 17h) bit description Legend: * default value.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.11 CCWPWL, CCWPWH — Counter-clockwise step pulse width register This register determines the step pulse width used for the phase sequence output waveforms during Counter-ClockWise (CCW) rotation. Table 27. CCWPWL, CCWPWH - Counter-clockwise step pulse width control register (address 18h, 19h) bit description Legend: * default value.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.12 CWSCOUNTL, CWSCOUNTH — Number of clockwise steps register This register determines the number of steps the motor should turn in clockwise direction. Table 29. CWSCOUNTL, CWSCOUNTH - Number of clockwise steps count register (address 1Ah, 1Bh) bit description Legend: * default value.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.16 EXTRASTEPS0, EXTRASTEPS1 — Extra steps count for INTP0, INTP1 control register Table 33. EXTRASTEPS0, EXTRASTEPS1 - Extra steps count for INTP0, INTP1 register (address 22h, 23h) bit description Legend: * default value.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller Table 35.
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx NXP Semiconductors PCA9629 Product data sheet speed duration to keep rotation/step in final speed define
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller During ramp-up and ramp-down phase of operation, the interrupt based controls do not affect the motor run. An interrupt can happen during ramp-up or ramp-down and it gets registered in the chip. Once the ramp-up operation is finished, then the interrupt is acted upon. A stop request from the microcontroller (writing MCNTL[7] to ‘0’) is the only event that affects the motor operation during ramp-up and ramp-down.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.19 MCNTL — Motor control register This register acts like the master control panel for driving the motor. It determines the type of motor operation and controls the starting/stopping of the motor. The registers from address 0Eh (INT_ACT_SETUP) to 25h (LOOPDLY) are referred to as the motor parameter registers. The user must first program the motor parameter registers that are required for the current run of the motor.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.3.19.2 MCNTL[5]: hard stop The ‘hard stop’ feature is only applicable for stop requests issued by the micro. It does not affect the interrupt based stop mechanism. This feature is used to stop the motor immediately when the micro issues a stop request. Hard stop feature has a higher priority over ramp down. So even if ramp down is enabled, if the micro issues a stop request, the motor stops immediately and does not ramp down to stop.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.4 Motor coil excitation Initially, after a power-up of the device, when the motor is started for the first time, the first coil that is energized is OUT0 (if the motor is turning in the clockwise direction), or OUT3 (if the motor is turning in the counter clockwise direction). This very first step (after a power-up) is not counted towards the number steps the motor is required to move (it is the reference step).
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.7 Software reset The Software Reset Call allows all the devices in the I2C-bus to be reset to the power-up state value through a specific formatted I2C-bus command. To be performed correctly, it implies that the I2C-bus is functional and that there is no device hanging the bus. The maximum wait time after software reset is 1 ms (typical). The SWRST Call function is defined as the following: 1. A START command is sent by the I2C-bus master.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.9 Phase sequence generator The PCA9629 phase sequence generator uses the on-chip oscillator and control logic to generate logic waveforms needed to support the following three types of stepper motor drive formats: • One-phase drive, also called ‘wave drive’ • Two-phase drive • Half-step drive These logic level outputs are used to drive high current power driver stages to provide required drive current to the stepper motor coils. 7.9.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 7.9.2 Two-phase drive In two-phase drive method, two windings are energized at any given time. In case of two-phase drive, the torque output of the unipolar wound motor is lower than the bipolar motor (for motors with the same winding parameters) since the unipolar motor uses only 50 % of the available winding, while the bipolar motor uses the entire winding.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller step pulses D output D C output C B output B A output A output disabled rotor position 002aae759 Four step stepper motor run with half-step waveforms increases the number of steps to eight. Fig 13. Half-step drive sequence waveforms Table 40.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 8. Characteristics of the I2C-bus The I2C-bus is for two-way, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller SDA SCL MASTER TRANSMITTER/ RECEIVER SLAVE RECEIVER SLAVE TRANSMITTER/ RECEIVER MASTER TRANSMITTER MASTER TRANSMITTER/ RECEIVER I2C-BUS MULTIPLEXER SLAVE 002aaa966 Fig 16. System configuration 8.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 10. Application design-in information 3.3 V 5V 1.6 kΩ 1.6 kΩ 1.1 kΩ 2 kΩ VDD MASTER CONTROLLER INT RST generates INTP0 P0 SCL P1 SDA P2 INT P3 generates INTP1 sensor 1 sensor 0 RESET PCA9629 position B OUT3 OUT2 OUT1 OUT0 AD1 AD0 12 V EXTERNAL HIGH CURRENT DRIVER position A electrical stepper motor M VSS 002aae760 Device address configured as 0100 0000b for this example. Fig 18. Typical application 10.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 10.2 Considerations when using GPIO pins P0 to P3 as inputs For proper operation of GPIO pins as inputs, the signals at the inputs must be free from any glitches or noise. The signals must be logic level inputs. For example, outputs from sensors must provide logic level signals at the input pins of PCA9629. This may require signal conditioning at the outputs of sensors. Another example is when using P0 to P3 for key switch sensing.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller • Before the specified number of rotations is completed in the CCW direction, if interrupt P1 happens, then it again reverses its rotation right away and start rotating in the CW direction for the specified number of rotations. • If no other interrupt happens, the motor finishes executing the specified number of rotations in the CW direction and then starts to ramp down.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller Table 42. Static characteristics …continued VDD = 4.5 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 28 - mA OUT0 to OUT3 outputs LOW-level output current IOL VOL = 0.5 V; VDD = 4.5 V [2] 25 IOL(tot) total LOW-level output current VOL = 0.5 V; VDD = 4.5 V [2] - - 120 mA VOH HIGH-level output voltage IOH = 10 mA; VDD = 4.5 V [3] 4.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 13. Dynamic characteristics Table 43. Dynamic characteristics VDD = 4.5 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +85 C; unless otherwise specified. Oscillator frequency = 1 MHz 5 % at 25 C (see Figure 23).
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller [9] The internal glitch filter rejects any LOW pulse less than 1 s. The system level reset pulse should be > 4 s for the chip to guarantee reset condition. 0.7 × VDD SDA 0.3 × VDD tr tBUF tf tHD;STA tSP tLOW 0.7 × VDD SCL 0.3 × VDD tHD;STA P tSU;STA tHD;DAT S tHIGH tSU;DAT tSU;STO Sr P 002aaa986 Fig 21.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 14. Test information VDD PULSE GENERATOR VI RL 500 Ω VO 2VDD open VSS DUT CL 50 pF RT 500 Ω 002aac019 RL = load resistance. CL = load capacitance includes jig and probe capacitance. RT = termination resistance should be equal to the output impedance Zo of the pulse generators. Fig 24.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 15. Package outline TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 16. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 17. Soldering of SMD packages This text provides a very brief insight into a complex technology.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 17.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 27. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 18. Abbreviations Table 46.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller Table 46. Abbreviations …continued Acronym Description NMOS Negative-channel Metal-Oxide Semiconductor MSB Most Significant Bit PCB Printed-Circuit Board pps pulses per second PWM Pulse Width Modulator POR Power-On Reset 19. Revision history Table 47. Revision history Document ID Release date Data sheet status Change notice Supersedes PCA9629 v.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 20. Legal information 20.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 22. Contents 1 2 3 4 4.1 5 6 6.1 6.2 7 7.1 7.2 7.3 7.3.1 7.3.1.1 7.3.1.2 7.3.2 7.3.3 7.3.4 7.3.4.1 7.3.4.2 7.3.5 7.3.5.1 7.3.5.2 7.3.5.3 7.3.5.4 7.3.5.5 7.3.5.6 7.3.5.7 7.3.6 7.3.6.1 7.3.6.2 7.3.6.3 7.3.6.4 7.3.7 7.3.8 7.3.9 7.3.10 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCA9629 NXP Semiconductors Fm+ I2C-bus stepper motor controller 15 16 17 17.1 17.2 17.3 17.4 18 19 20 20.1 20.2 20.3 20.4 21 22 Package outline . . . . . . . . . . . . . . . . . . . . . . . . Handling information. . . . . . . . . . . . . . . . . . . . Soldering of SMD packages . . . . . . . . . . . . . . Introduction to soldering . . . . . . . . . . . . . . . . . Wave and reflow soldering . . . . . . . . . . . . . . . Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . Reflow soldering . . .