PCF85134 Universal 60 x 4 LCD segment driver for multiplex rates up to 1:4 Rev. 3 — 12 May 2014 Product data sheet 1. General description The PCF85134 is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD)1 with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 60 segments. It can be easily cascaded for larger LCD applications.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 3. Ordering information Table 1. Ordering information Type number Package PCF85134HL Name Description Version LQFP80 plastic low profile quad flat package; 80 leads; body 12 12 1.4 mm SOT315-1 3.1 Ordering options Table 2.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 5. Block diagram 6 WR 6 %3 %3 %3 %3 9/&' %$&.3/$1( 2873876 /&' 92/7$*( 6(/(&725 ',63/$< 6(*0(17 2873876 ',63/$< 5(*,67(5 287387 %$1. 6(/(&7 $1' %/,1. &21752/ ',63/$< &21752/ /&' %,$6 *(1(5$725 966 3&) &/. 6<1& &/2&. 6(/(&7 $1' 7,0,1* %/,1.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 6. Pinning information 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6.1 Pinning 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 3&) 6 6 &/.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 6.2 Pin description Table 4. Pin description Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified. PCF85134 Product data sheet Symbol Pin Type Description S31 to S59 1 to 29 output LCD segment output 31 to 59 BP0 to BP3 30 to 33 output LCD backplane output 0 to 3 n.c.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 7. Functional description The PCF85134 is a versatile peripheral device designed to interface between any microcontroller to a wide variety of LCD segment or dot matrix displays (see Figure 3). It can directly drive any static or multiplexed LCD containing up to four backplanes and up to 60 segments. The display configurations possible with the PCF85134 depend on the required number of active backplane outputs.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 9'' 9/&' 5 WU &E 9'' 9/&' VHJPHQW GULYHV 6'$ +267 0,&52 &21752//(5 /&' 3$1(/ XS WR HOHPHQWV 3&) 6&/ EDFNSODQHV 26& $ $ $ 6$ 966 966 DDD Fig 4. Typical system configuration The host microcontroller maintains the 2-line I2C-bus communication channel with the PCF85134.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 7.3 LCD voltage selector The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the selected LCD drive configuration. The operation of the voltage selector is controlled by the mode-set command from the command decoder.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates V on RMS D = ---------------------- = V off RMS 2 a + 2a + n --------------------------2 a – 2a + n (3) Using Equation 3, the discrimination for an LCD drive mode of 1:3 multiplex with 1⁄ 2 bias is 1⁄ 2 21 bias is ---------- = 1.528 . 3 3 = 1.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 5HODWLYH 7UDQVPLVVLRQ 9WK RII 2)) 6(*0(17 9WK RQ *5(< 6(*0(17 9506 >9@ 21 6(*0(17 DDD Fig 5. PCF85134 Product data sheet Electro-optical characteristic: relative transmission curve of the liquid All information provided in this document is subject to legal disclaimers. Rev. 3 — 12 May 2014 © NXP Semiconductors N.V. 2014. All rights reserved.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 7.4 LCD drive mode waveforms 7.4.1 Static drive mode The static LCD drive mode is used when a single backplane is provided in the LCD. Backplane and segment drive waveforms for this mode are shown in Figure 6.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 7.4.2 1:2 Multiplex drive mode When two backplanes are provided in the LCD, the 1:2 multiplex mode applies. The PCF85134 allows the use of 1⁄2 bias or 1⁄3 bias in this mode as shown in Figure 7 and Figure 8.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 7IU 9/&' %3 %3 /&' VHJPHQWV 9/&' 9/&' 966 VWDWH 9/&' 9/&' VWDWH 9/&' 966 9/&' 6Q 9/&' 9/&' 966 9/&' 6Q 9/&' 9/&' 966 D :DYHIRUPV DW GULYHU 9/&' 9/&' VWDWH 9/&' 9 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' VWDWH 9 9/&' 9/&' 9/&' E 5HVXOWDQW ZDYHIRUPV DW /&' VHJPHQW DDD Vstate1(t) = VSn(t) VBP0(t). Von(RMS) = 0.745VLCD.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 7.4.3 1:3 Multiplex drive mode When three backplanes are provided in the LCD, the 1:3 multiplex drive mode applies, as shown in Figure 9.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 7.4.4 1:4 Multiplex drive mode When four backplanes are provided in the LCD, the 1:4 multiplex drive mode applies, as shown in Figure 10.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 7.5 Oscillator The internal logic and the LCD drive signals of the PCF85134 are timed by the frequency fclk. It equals either the built-in oscillator frequency fosc or the external clock frequency fclk(ext). The clock frequency fclk determines the LCD frame frequency (ffr). 7.5.1 Internal clock The internal oscillator is enabled by connecting pin OSC to pin VSS.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 7.9 Backplane outputs The LCD drive section includes four backplane outputs BP0 to BP3 which must be connected directly to the LCD. The backplane output signals are generated in accordance with the selected LCD drive mode. • In 1:4 multiplex drive mode: BP0 to BP3 must be connected directly to the LCD. If less than four backplane outputs are required, the unused outputs can be left open-circuit.
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PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates When display data is transmitted to the PCF85134, the display bytes received are stored in the display RAM in accordance with the selected LCD multiplex drive mode. The data is stored as it arrives and depending on the current multiplex drive mode, data is stored singularly, in pairs, triples, or quadruples.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates In cascaded applications each PCF85134 in the cascade must be addressed separately. Initially, the first PCF85134 is selected by sending the device-select command matching the first hardware subaddress. Then the data pointer is set to the preferred display RAM address by sending the load-data-pointer command.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates Depending on the method of writing to the RAM (standard or entire filling by rewriting), some elements remain unused or can be used. But it has to be considered in the module layout process as well as in the driver software design. 7.10.4 Bank selector 7.10.4.1 Output bank selector The output bank selector (see Table 15) selects one of the four rows per display RAM address for transfer to the display register.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates Table 10. Blink frequencies Blink mode Operating mode ratio Blink frequency with respect to fclk (typical) Unit fclk = 1970 Hz off - blinking off Hz 1 f clk f blink = -------768 2.5 Hz 2 f clk f blink = ----------1536 1.3 Hz 3 f clk f blink = ----------3072 0.6 Hz An additional feature is for an arbitrary selection of LCD segments to blink.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates Table 12.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates Table 15. Bank-select command bit description See Section 7.10.4 on page 21.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 8. Characteristics of the I2C-bus The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 0$67(5 75$160,77(5 5(&(,9(5 6/$9( 75$160,77(5 5(&(,9(5 6/$9( 5(&(,9(5 0$67(5 75$160,77(5 5(&(,9(5 0$67(5 75$160,77(5 6'$ 6&/ PJD Fig 15. System configuration 8.3 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of 8 bits is followed by an acknowledge cycle.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 8.4 I2C-bus controller The PCF85134 acts as an I2C-bus slave receiver. It does not initiate I2C-bus transfers or transmit data to an I2C-bus master receiver. The only data output from the PCF85134 are the acknowledge signals of the selected devices. Device selection depends on the I2C-bus slave address, on the transferred command data and on the hardware subaddress.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 5 : VODYH DGGUHVV FRQWURO E\WH 6 & 5 6 $ $ 2 6 5$0 FRPPDQG E\WH / 6 3 % 0 $ 6 % (;$03/(6 D WUDQVPLW WZR E\WHV RI 5$0 GDWD 6 6 $ $ $ 5$0 '$7$ $ $ &200$1' $ $ &200$1' $ 3 $ &200$1' $ $ 5$0 '$7$ $ 5$0 '$7$ $ 3 E WUDQVPLW WZR FRPPDQG E\WHV 6 6 $ $ F WUDQVPLW RQH FRPPDQG E\WH DQG WZR 5$0 GDWH E\WHV 6 6
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates The acknowledgement, after each byte, is made only by the A0, A1, and A2 addressed PCF85134. After the last display byte, the I2C-bus master issues a STOP condition (P). Alternatively a START may be issued to RESTART I2C-bus access. 9. Internal circuitry 9'' 9'' 966 966 6$ 9'' &/.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 10. Safety notes CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling electrostatic sensitive devices. Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or equivalent standards.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 11. Limiting values Table 19. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).[1] Symbol Parameter VDD Conditions Min Max Unit supply voltage 0.5 +6.5 V IDD supply current 50 +50 mA VLCD LCD supply voltage 0.5 +7.5 V IDD(LCD) LCD supply current 50 +50 mA ISS ground supply current 50 +50 mA VI input voltage [2] 0.5 +6.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 12. Static characteristics Table 20. Static characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Supplies VDD supply voltage 1.8 - 5.5 V VLCD LCD supply voltage 2.5 - 6.5 V fclk(ext) = 1536 Hz [1] - 8 20 A fclk(ext) = 1536 Hz [1] - 24 60 A VSS 0.5 - VDD + 0.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates [1] LCD outputs are open-circuit; inputs at VSS or VDD; external clock with 50 % duty factor; I2C-bus inactive. [2] Not tested, design specification only. [3] The I2C-bus interface of PCF85134 is 5 V tolerant. [4] Cbpl = backplane capacitance. [5] Measured on sample basis only. [6] Csgm = segment capacitance.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 13. Dynamic characteristics Table 21. Dynamic characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates Table 21. Dynamic characteristics …continued VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter tf Conditions Min Typ Max Unit fall time of both SDA and SCL signals - - 0.3 s Cb capacitive load for each bus line - - 400 pF tw(spike) spike pulse width - - 50 ns [1] Typical output (duty cycle = 50 %).
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 6'$ W%8) W/2: WI 6&/ W+' 67$ WU W+' '$7 W+,*+ W68 '$7 6'$ W68 67$ W68 672 PJD Fig 21. I2C-bus timing waveforms PCF85134 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 12 May 2014 © NXP Semiconductors N.V. 2014. All rights reserved.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 14. Application information 14.1 Cascaded operation Large display configurations of up to 16 PCF85134s can be recognized on the same I2C-bus by using the 3-bit hardware subaddress (A0, A1 and A2) and the programmable I2C-bus slave address (SA0). Table 22.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 9'' 9/&' 6'$ VHJPHQW GULYHV 6&/ 3&) 6<1& &/. %3 WR %3 RSHQ FLUFXLW 26& $ $ $ 6$ 966 /&' 3$1(/ 9/&' 9'' 5 +267 0,&52 352&(6625 0,&52 &21752//(5 WU &E 9'' 9/&' VHJPHQW GULYHV 6'$ 6&/ 6<1& 3&) &/. %3 WR %3 26& $ 966 $ $ EDFNSODQHV 6$ 966 DDD (1) Is master (OSC connected to VSS). (2) Is slave (OSC connected to VDD). Fig 22.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates Table 23. SYNC contact resistance Number of devices Maximum contact resistance 2 6000 3 to 5 2200 6 to 10 1200 11 to 16 700 The PCF85134 can always be cascaded with other devices of the same type or conditionally with other devices of the same family. This allows optimal drive selection for a given number of pixels to display. Figure 21 and Figure 23 show the timing of the synchronization signals.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates If an external clock source is used, all PCF85134 in the cascade must be configured such as to receive the clock from that external source (pin OSC connected to VDD). It must be ensured that the clock tree is designed such that on all PCF85134 the clock propagation delay from the clock source to all PCF85134 in the cascade is as equal as possible since otherwise synchronization artifacts may occur.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 15.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 16. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that all normal precautions are taken as described in JESD625-A, IEC 61340-5 or equivalent standards. 17. Packing information For tape and reel packing information, please see Ref. 12 “SOT315-1_118” on page 48. 18.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates • Inspection and repair • Lead-free soldering versus SnPb soldering 18.3 Wave soldering Key characteristics in wave soldering are: • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 18.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 25. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”.
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PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 20. Abbreviations Table 27.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 21.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 23. Legal information 23.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 25. Tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Ordering information . . . . . . . . . . . . . . . . . . . . .2 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . .
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 26. Figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. Fig 15. Fig 16. Fig 17. Fig 18. Fig 19. Fig 20. Fig 21. Fig 22. Fig 23. Fig 24. Fig 25. Block diagram of PCF85134 . . . . . . . . . . . . . . . . .3 Pin configuration for SOT315-1 (PCF85134). . . . .4 Example of displays suitable for PCF85134 . . . . .6 Typical system configuration . . . . . . . . . . .
PCF85134 NXP Semiconductors Universal 60 x 4 LCD segment driver for low multiplex rates 27. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . .