PCF85162 32 × 4 universal LCD driver for low multiplex rates Rev. 5 — 17 December 2014 Product data sheet 1. General description The PCF85162 is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD)1 with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 32 segments. It can be easily cascaded for larger LCD applications.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 3. Ordering information Table 1. Ordering information Type number Package PCF85162T Name Description Version TSSOP48 plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 3.1 Ordering options Table 2. Ordering options Product type number IC revision Sales item (12NC) Delivery form PCF85162T/1 1 935290708118 tape and reel, 13 inch 4. Marking Table 3.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 5. Block diagram %3 %3 %3 %3 6 WR 6 9/&' %$&.3/$1( 2873876 ',63/$< 6(*0(17 2873876 ',63/$< 5(*,67(5 /&' 92/7$*( 6(/(&725 966 &/. 6<1& 26& ',63/$< &21752//(5 /&' %,$6 *(1(5$725 287387 %$1. 6(/(&7 $1' %/,1. &21752/ 3&) &/2&. 6(/(&7 $1' 7,0,1* %/,1.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 6. Pinning information 6.1 Pinning 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6'$ 6 6&/ 6 6<1& &/.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 6.2 Pin description Table 4. Pin description Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates Table 6. C bit description Bit Symbol 7 C Value Description continue bit 0 last control byte in the transfer; next byte will be regarded as display data 1 control bytes continue; next byte will be a command too 7.1.1 Command: mode-set The mode-set command allows configuring the multiplex mode, the bias levels and enabling or disabling the display. Table 7.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7.1.3 Command: device-select The device-select command allows defining the subaddress counter value. Table 9. Device-select command bit description See Section 7.6.2. Bit Symbol Value Description 7 C 0, 1 see Table 6 6 to 3 - 1100 fixed value 2 to 0 A[2:0] 000[1] to 111 3 bit binary value, 0 to 7; transferred to the subaddress counter to define one of eight hardware subaddresses [1] Default value. 7.1.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates Table 11. Blink-select command bit description See Section 7.1.5.1. Bit Symbol Description 7 C 0, 1 see Table 6 6 to 3 - 1110 fixed value 2 AB 1 to 0 7.1.5.1 Value blink mode selection 0[1] normal blinking[2] 1 alternate RAM bank blinking[3] BF[1:0] blink frequency selection 00[1] off 01 1 10 2 11 3 [1] Default value.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates Table 12. Blink frequencies Blink mode Blink frequency equation[1] off - 1 f clk f blink = --------768 2 f clk f blink = -----------1536 3 f clk f blink = -----------3072 [1] The blink frequency is proportional to the clock frequency (fclk). For the range of the clock frequency see Table 20. 7.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7.3 Possible display configurations The possible display configurations of the PCF85162 depend on the number of active backplane outputs required. A selection of display configurations is shown in Table 13. All of these configurations can be implemented in the typical system shown in Figure 4. GRW PDWUL[ VHJPHQW ZLWK GRW VHJPHQW ZLWK GRW DQG DFFHQW DDD Fig 3.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 9'' 5 WU &E 9'' 9/&' VHJPHQW GULYHV 6'$ +267 0,&52 352&(6625 0,&52 &21752//(5 6&/ 26& /&' 3$1(/ 3&) EDFNSODQHV $ $ $ XS WR HOHPHQWV 6$ 966 DDD 966 The resistance of the power lines must be kept to a minimum. Fig 4. Typical system configuration The host microcontroller maintains the 2-line I2C-bus communication channel with the PCF85162.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates Table 14. Biasing characteristics LCD drive mode Number of: LCD bias Backplanes Levels configuration V off RMS ------------------------V LCD V on RMS -----------------------V LCD static V on RMS D = -----------------------V off RMS 1 2 static 0 1 1:2 multiplex 2 3 1⁄ 2 0.354 0.791 2.236 1:2 multiplex 2 4 1⁄ 3 0.333 0.745 2.236 4 1⁄ 3 0.333 0.638 1.915 4 1⁄ 3 0.333 0.577 1.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates The advantage of these LCD drive modes is a reduction of the LCD full scale voltage VLCD as follows: • 1:3 multiplex (1⁄2 bias): V LCD = 6 V off RMS = 2.449V off RMS 4 3 - = 2.309V off RMS • 1:4 multiplex (1⁄2 bias): V LCD = --------------------3 These compare with V LCD = 3V off RMS when 1⁄3 bias is used. It should be noted that VLCD is sometimes referred as the LCD operating voltage. 7.3.3.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7.3.4 LCD drive mode waveforms 7.3.4.1 Static drive mode The static LCD drive mode is used when a single backplane is provided in the LCD. The backplane (BPn) and segment (Sn) drive waveforms for this mode are shown in Figure 6.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7.3.4.2 1:2 Multiplex drive mode When two backplanes are provided in the LCD, the 1:2 multiplex mode applies. The PCF85162 allows the use of 1⁄2 bias or 1⁄3 bias in this mode as shown in Figure 7 and Figure 8.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7IU 9/&' %3 %3 /&' VHJPHQWV 9/&' 9/&' 966 VWDWH 9/&' 9/&' VWDWH 9/&' 966 9/&' 6Q 9/&' 9/&' 966 9/&' 6Q 9/&' 9/&' 966 D :DYHIRUPV DW GULYHU 9/&' 9/&' VWDWH 9/&' 9 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' VWDWH 9 9/&' 9/&' 9/&' E 5HVXOWDQW ZDYHIRUPV DW /&' VHJPHQW DDD Vstate1(t) = VSn(t) VBP0(t). Von(RMS) = 0.745VLCD.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7.3.4.3 1:3 Multiplex drive mode When three backplanes are provided in the LCD, the 1:3 multiplex drive mode applies, as shown in Figure 9.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7.3.4.4 1:4 Multiplex drive mode When four backplanes are provided in the LCD, the 1:4 multiplex drive mode applies as shown in Figure 10.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7.4 Oscillator 7.4.1 Internal clock The internal logic of the PCF85162 and its LCD drive signals are timed either by its internal oscillator or by an external clock. The internal oscillator is enabled by connecting pin OSC to pin VSS. If the internal oscillator is used, the output from pin CLK can be used as the clock signal for several PCF85162 in the system that are connected in cascade. 7.4.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7.6 Display RAM The display RAM is a static 32 4-bit RAM which stores LCD data. There is a one-to-one correspondence between • the bits in the RAM bitmap and the LCD segments/elements • the RAM columns and the segment outputs • the RAM rows and the backplane outputs. A logic 1 in the RAM bitmap indicates the on-state of the corresponding LCD element; similarly, a logic 0 indicates the off-state.
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PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7.6.1 Data pointer The addressing mechanism for the display RAM is realized using the data pointer. This allows the loading of an individual display data byte, or a series of display data bytes, into any location of the display RAM. The sequence commences with the initialization of the data pointer by the load-data-pointer command (see Table 8).
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates Table 15. Standard RAM filling in 1:3 multiplex drive mode Assumption: BP2/S2, BP2/S5, BP2/S8 etc. are not connected to any segments/elements on the display.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates • In 1:3 multiplex mode, rows 0, 1, and 2 are selected sequentially • In 1:2 multiplex mode, rows 0 and 1 are selected • In static mode, row 0 is selected The PCF85162 includes a RAM bank switching feature in the static and 1:2 multiplex drive modes. In the static drive mode, the bank-select command may request the contents of row 2 to be selected for display instead of the contents of row 0.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates LQSXW EDQN VHOHFWLRQ FRQWUROV WKH LQSXW GDWD SDWK RXWSXW EDQN VHOHFWLRQ FRQWUROV WKH RXWSXW GDWD SDWK %$1. 0,&52&21752//(5 ',63/$< 5$0 %$1. DDD Fig 14. Bank selection In the static drive mode, the bank-select command may request the contents of row 2 to be selected for display instead of the contents of row 0.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 8. Characteristics of the I2C-bus The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 0$67(5 75$160,77(5 5(&(,9(5 6/$9( 75$160,77(5 5(&(,9(5 6/$9( 5(&(,9(5 0$67(5 75$160,77(5 5(&(,9(5 0$67(5 75$160,77(5 6'$ 6&/ PJD Fig 18. System configuration 8.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge cycle.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 8.5 I2C-bus controller The PCF85162 acts as an I2C-bus slave receiver. It does not initiate I2C-bus transfers or transmit data to an I2C-bus master receiver. The only data output from the PCF85162 are the acknowledge signals of the selected devices. Device selection depends on the I2C-bus slave address, on the transferred command data and on the hardware subaddress.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates DFNQRZOHGJH E\ $ $ DQG $ VHOHFWHG 3&) RQO\ DFNQRZOHGJH E\ DOO DGGUHVVHG 3&) 5 : VODYH DGGUHVV 6 6 $ $ & &200$1' $ Q E\WH V E\WH ',63/$< '$7$ $ 3 Q E\WH V XSGDWH GDWD SRLQWHUV DQG LI QHFHVVDU\ VXEDGGUHVV FRXQWHU DDD Fig 20. I2C-bus protocol After an acknowledgement, one or more command bytes follow that define the status of each addressed PCF85162.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 9. Internal circuitry 9'' 9'' 966 966 6$ 9'' &/. 6&/ 966 9'' 966 26& 966 9'' 6'$ 6<1& 966 966 9'' $ $ 7 966 9/&' %3 %3 %3 %3 966 9/&' 9/&' 6 WR 6 966 966 DDF Fig 22. Device protection circuits PCF85162 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 17 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 10. Safety notes CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling electrostatic sensitive devices. Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or equivalent standards. CAUTION Static voltages across the liquid crystal display can build up when the LCD supply voltage (VLCD) is on while the IC supply voltage (VDD) is off, or vice versa.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 12. Static characteristics Table 19. Static characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 1.8 2.5 - 5.5 V - 6.5 V - 3.5 7 A - 2.7 - A - 23 32 A - 13 - A 1.0 1.3 1.6 V VSS - 0.3VDD V 0.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates Table 19. Static characteristics …continued VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 100 - +100 mV on pins BP0 to BP3 - 1.5 - k on pins S0 to S31 - 6.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 13. Dynamic characteristics Table 20. Dynamic characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates Table 20. Dynamic characteristics …continued VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter tf Conditions Min Typ Max Unit fall time of both SDA and SCL signals - - 0.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 14. Application information 14.1 Cascaded operation Large display configurations of up to 16 PCF85162 can be recognized on the same I2C-bus by using the 3-bit hardware subaddress (A0, A1, and A2) and the programmable I2C-bus slave address (SA0). Table 21.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 6'$ W%8) W/2: WI 6&/ W+' 67$ WU W+' '$7 W+,*+ W68 '$7 6'$ W68 67$ W68 672 PJD (1) Is master (OSC connected to VSS). (2) Is slave (OSC connected to VDD). Fig 26. Cascaded PCF85162 configuration The SYNC line is provided to maintain the correct synchronization between all cascaded PCF85162. Synchronization is guaranteed after a power-on reset.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 7IU IIU %3 6<1& D VWDWLF GULYH PRGH %3 ELDV %3 ELDV 6<1& E PXOWLSOH[ GULYH PRGH %3 ELDV 6<1& F PXOWLSOH[ GULYH PRGH %3 ELDV 6<1& G PXOWLSOH[ GULYH PRGH PJO Fig 27. Synchronization of the cascade for the various PCF85162 drive modes Only one master but multiple slaves are allowed in a cascade.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 15.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 16. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that all normal precautions are taken as described in JESD625-A, IEC 61340-5 or equivalent standards. 17. Packing information 17.1 Tape and reel information For tape and reel packing information, please see Ref. 10 “SOT362-1_118” on page 47.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates • Package placement • Inspection and repair • Lead-free soldering versus SnPb soldering 18.3 Wave soldering Key characteristics in wave soldering are: • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 18.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 29. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 19.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates )RRWSULQW LQIRUPDWLRQ IRU UHIORZ VROGHULQJ RI 76623 SDFNDJH 627 +[ *[ 3 +\ *\ %\ $\ & ' [ ' 3 *HQHULF IRRWSULQW SDWWHUQ 5HIHU WR WKH SDFNDJH RXWOLQH GUDZLQJ IRU DFWXDO OD\RXW VROGHU ODQG RFFXSLHG DUHD ',0(16,216 LQ PP 3 3 $\ %\ & ' ' *[ *\ +[ +\ VRW BIU Fig 30.
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PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 21. Abbreviations Table 26.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 22.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 23. Revision history Table 27. Revision history Document ID Release date Data sheet status Change notice Supersedes PCF85162 v.5 20141217 Product data sheet - PCF85162 v.4 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • • • Legal texts have been adapted to the new company name where appropriate.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 24. Legal information 24.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 26. Tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Ordering information . . . . . . . . . . . . . . . . . . . . .2 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . .2 Marking codes . . . . .
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 27. Figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. Fig 15. Fig 16. Fig 17. Fig 18. Fig 19. Fig 20. Fig 21. Fig 22. Fig 23. Fig 24. Fig 25. Fig 26. Fig 27. Fig 28. Fig 29. Fig 30. Block diagram of PCF85162 . . . . . . . . . . . . . . . . .3 Pin configuration for TSSOP48 (PCF85162T) . . . .4 Example of displays suitable for PCF85162 . . . .
PCF85162 NXP Semiconductors 32 × 4 universal LCD driver for low multiplex rates 28. Contents 1 2 3 3.1 4 5 6 6.1 6.2 7 7.1 7.1.1 7.1.2 7.1.3 7.1.4 7.1.5 7.1.5.1 7.2 7.3 7.3.1 7.3.2 7.3.3 7.3.3.1 7.3.4 7.3.4.1 7.3.4.2 7.3.4.3 7.3.4.4 7.4 7.4.1 7.4.2 7.4.3 7.5 7.5.1 7.5.2 7.6 7.6.1 7.6.2 7.6.3 7.6.4 7.6.5 7.6.5.1 7.6.5.2 7.6.5.3 8 8.1 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . .