PCF85176 40 x 4 universal LCD driver for low multiplex rates Rev. 5 — 6 January 2015 Product data sheet 1. General description The PCF85176 is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD)1 with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 40 segments. It can be easily cascaded for larger LCD applications.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 3. Ordering information Table 1. Ordering information Type number Package Name Description Version PCF85176H TQFP64 plastic thin quad flat package, 64 leads; body 10 10 1.0 mm SOT357-1 PCF85176T TSSOP56 plastic thin shrink small outline package, 56 leads; body width 6.1 mm SOT364-1 3.1 Ordering options Table 2.
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PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 6.2 Pin description Table 4. Pin description Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7. Functional description The PCF85176 is a versatile peripheral device designed to interface between any microcontroller to a wide variety of LCD segment or dot matrix displays (see Figure 4). It can directly drive any static or multiplexed LCD containing up to four backplanes and up to 40 segments. 7.1 Commands of PCF85176 The commands available to the PCF85176 are defined in Table 5. Table 5.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.1.1 Command: mode-set The mode-set command allows configuring the multiplex mode, the bias levels and enabling or disabling the display. Table 7.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.1.3 Command: device-select The device-select command allows defining the subaddress counter value. Table 9. Device-select command bit description See Section 7.6.2. Bit Symbol Value Description 7 C 0, 1 see Table 6 fixed value 6 to 3 - 1100 2 to 0 A[2:0] 000[1] to 111 3-bit binary value, 0 to 7; transferred to the subaddress counter to define 1 of 8 hardware subaddresses [1] Default value. 7.1.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.1.5 Command: blink-select The blink-select command allows configuring the blink mode and the blink frequency. Table 11. Blink-select command bit description See Section 7.1.5.1. Bit Symbol Value Description 7 C 0, 1 see Table 6 6 to 3 - 1110 2 AB 1 to 0 7.1.5.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates Table 12. Blink frequencies Blink mode Blink frequency[1] off - 1 f clk f blink = --------768 2 f clk f blink = -----------1536 3 f clk f blink = -----------3072 [1] The blink frequency is proportional to the clock frequency (fclk). For the range of the clock frequency, see Table 20. 7.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.3 Possible display configurations The possible display configurations of the PCF85176 depend on the number of active backplane outputs required. A selection of display configurations is shown in Table 13. All of these configurations can be implemented in the typical system shown in Figure 5. GRW PDWUL[ VHJPHQW ZLWK GRW VHJPHQW ZLWK GRW DQG DFFHQW DDD Fig 4.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 9'' 5 WU &% 9'' 9/&' VHJPHQW GULYHV 6'$ +267 0,&52 352&(6625 0,&52 &21752//(5 /&' 3$1(/ 6&/ 3&) EDFNSODQHV 26& $ $ $ XS WR HOHPHQWV 6$ 966 DDD 966 The resistance of the power lines must be kept to a minimum. Fig 5. Typical system configuration The host microcontroller maintains the 2-line I2C-bus communication channel with the PCF85176.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates A practical value for VLCD is determined by equating Voff(RMS) with a defined LCD threshold voltage (Vth(off)), typically when the LCD exhibits approximately 10 % contrast. In the static drive mode, a suitable choice is VLCD > 3Vth(off). Multiplex drive modes of 1:3 and 1:4 with 1⁄2 bias are possible but the discrimination and hence the contrast ratios are smaller.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.3.3.1 Electro-optical performance Suitable values for Von(RMS) and Voff(RMS) are dependent on the LCD liquid used. The RMS voltage, at which a pixel is switched on or off, determine the transmissibility of the pixel. For any given liquid, there are two threshold values defined. One point is at 10 % relative transmission (at Vth(off)) and the other at 90 % relative transmission (at Vth(on)), see Figure 6.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.3.4 LCD drive mode waveforms 7.3.4.1 Static drive mode The static LCD drive mode is used when a single backplane is provided in the LCD. The backplane (BPn) and segment (Sn) drive waveforms for this mode are shown in Figure 7.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.3.4.2 1:2 Multiplex drive mode When two backplanes are provided in the LCD, the 1:2 multiplex mode applies. The PCF85176 allows the use of 1⁄2 bias or 1⁄3 bias in this mode as shown in Figure 8 and Figure 9.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7IU 9/&' %3 %3 /&' VHJPHQWV 9/&' 9/&' 966 VWDWH 9/&' 9/&' VWDWH 9/&' 966 9/&' 6Q 9/&' 9/&' 966 9/&' 6Q 9/&' 9/&' 966 D :DYHIRUPV DW GULYHU 9/&' 9/&' VWDWH 9/&' 9 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' VWDWH 9 9/&' 9/&' 9/&' E 5HVXOWDQW ZDYHIRUPV DW /&' VHJPHQW DDD Vstate1(t) = VSn(t) VBP0(t). Von(RMS) = 0.745VLCD.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.3.4.3 1:3 Multiplex drive mode When three backplanes are provided in the LCD, the 1:3 multiplex drive mode applies, as shown in Figure 10.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.3.4.4 1:4 Multiplex drive mode When four backplanes are provided in the LCD, the 1:4 multiplex drive mode applies as shown in Figure 11.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.4 Oscillator 7.4.1 Internal clock The internal logic of the PCF85176 and its LCD drive signals are timed either by its internal oscillator or by an external clock. The internal oscillator is enabled by connecting pin OSC to pin VSS. If the internal oscillator is used, the output from pin CLK can be used as the clock signal for several PCF85176 in the system that are connected in cascade. 7.4.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.6 Display RAM The display RAM is a static 40 4-bit RAM which stores LCD data. There is a one-to-one correspondence between • the bits in the RAM bitmap and the LCD segments/elements • the RAM columns and the segment outputs • the RAM rows and the backplane outputs. A logic 1 in the RAM bitmap indicates the on-state of the corresponding LCD element; similarly, a logic 0 indicates the off-state.
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PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.6.1 Data pointer The addressing mechanism for the display RAM is realized using the data pointer. This allows the loading of an individual display data byte, or a series of display data bytes, into any location of the display RAM. The sequence commences with the initialization of the data pointer by the load-data-pointer command (see Table 8).
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.6.3 RAM writing in 1:3 multiplex drive mode In 1:3 multiplex drive mode, the RAM is written as shown in Table 15 (see Figure 13 as well). Table 15. Standard RAM filling in 1:3 multiplex drive mode Assumption: BP2/S2, BP2/S5, BP2/S8 etc. are not connected to any segments/elements on the display.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 7.6.4 Writing over the RAM address boundary In all multiplex drive modes, depending on the setting of the data pointer, it is possible to fill the RAM over the RAM address boundary. If the PCF85176 is part of a cascade the additional bits fall into the next device that also generates the acknowledge signal.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates GLVSOD\ 5$0 DGGUHVVHV FROXPQV VHJPHQW RXWSXWV 6 6WDWLF GULYH PRGH GLVSOD\ 5$0 ELWV URZV EDFNSODQH RXWSXWV %3 EDQN EDQN 0XOWLSOH[ GULYH PRGH EDQN EDQN DDD Fig 14. RAM banks in static and multiplex driving mode 1:2 There are two banks; bank 0 and bank 1.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates FROXPQV GLVSOD\ 5$0 FROXPQV VHJPHQW RXWSXWV 6 URZV RXWSXW 5$0 EDQN WR WKH /&' GLVSOD\ 5$0 URZV EDFNSODQH RXWSXWV %3 WR WKH 5$0 LQSXW 5$0 EDQN DDD Fig 16. Example of the Bank-select command with multiplex drive mode 1:2 PCF85176 Product data sheet All information provided in this document is subject to legal disclaimers. Rev.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 8. Characteristics of the I2C-bus The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 0$67(5 75$160,77(5 5(&(,9(5 6/$9( 75$160,77(5 5(&(,9(5 6/$9( 5(&(,9(5 0$67(5 75$160,77(5 5(&(,9(5 0$67(5 75$160,77(5 6'$ 6&/ PJD Fig 19. System configuration 8.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of 8 bits is followed by an acknowledge cycle.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 8.5 I2C-bus controller The PCF85176 acts as an I2C-bus slave receiver. It does not initiate I2C-bus transfers or transmit data to an I2C-bus master receiver. The only data output from the PCF85176 are the acknowledge signals of the selected devices. Device selection depends on the I2C-bus slave address, on the transferred command data and on the hardware subaddress.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates DFNQRZOHGJH E\ $ $ DQG $ VHOHFWHG 3&) RQO\ DFNQRZOHGJH E\ DOO DGGUHVVHG 3&) 5 : VODYH DGGUHVV 6 6 $ $ & &200$1' $ ',63/$< '$7$ E\WH Q E\WH $ 3 Q E\WH XSGDWH GDWD SRLQWHUV DQG LI QHFHVVDU\ VXEDGGUHVV FRXQWHU DDD Fig 21. I2C-bus protocol After an acknowledgement, one or more command bytes follow that define the status of each addressed PCF85176.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 9. Internal circuitry 9'' 9'' 966 966 6$ 9'' &/. 6&/ 966 9'' 966 26& 966 9'' 6'$ 6<1& 966 966 9'' $ $ 7 966 9/&' %3 %3 %3 %3 966 9/&' 9/&' 6 WR 6 966 966 PGE Fig 23. Device protection circuits PCF85176 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 6 January 2015 © NXP Semiconductors N.V. 2015. All rights reserved.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 10. Safety notes CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling electrostatic sensitive devices. Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or equivalent standards. CAUTION Static voltages across the liquid crystal display can build up when the LCD supply voltage (VLCD) is on while the IC supply voltage (VDD) is off, or vice versa.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 12. Static characteristics Table 19. Static characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 1.8 2.5 - 5.5 V - 6.5 V - 3.5 7 A - 2.7 - A - 23 32 A - 13 - A 1.0 1.3 1.6 V VSS - 0.3VDD V 0.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates DDD ,'' $ 9'' 9 Tamb = 30 C; 1:4 multiplex drive mode; VLCD = 6.5 V; fclk(ext) = 1.536 kHz; all RAM written with logic 1; no display connected; I2C-bus inactive. Fig 24. Typical IDD with respect to VDD PCF85176 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 6 January 2015 © NXP Semiconductors N.V. 2015.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 13. Dynamic characteristics Table 20. Dynamic characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates Table 20. Dynamic characteristics …continued VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter tf Conditions Min Typ Max Unit fall time of both SDA and SCL signals - - 0.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 14. Application information 14.1 Cascaded operation Large display configurations of up to 16 PCF85176 can be recognized on the same I2C-bus by using the 3-bit hardware subaddress (A0, A1, and A2) and the programmable I2C-bus slave address (SA0). Table 21.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 9'' 9/&' 6'$ VHJPHQW GULYHV 6&/ 6<1& 3&) &/. %3 WR %3 RSHQ FLUFXLW 26& $ $ $ 6$ 966 /&' 3$1(/ 9/&' 9'' 5 +267 0,&52 352&(6625 0,&52 &21752//(5 WU &E 9'' 9/&' VHJPHQW GULYHV 6'$ 6&/ 6<1& 3&) &/. %3 WR %3 26& $ 966 $ $ EDFNSODQHV 6$ 966 DDD (1) Is master (OSC connected to VSS). (2) Is slave (OSC connected to VDD). Fig 27.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates If an external clock source is used, all PCF85176 in the cascade must be configured such as to receive the clock from that external source (pin OSC connected to VDD). Thereby it must be ensured that the clock tree is designed such that on all PCF85176 the clock propagation delay from the clock source to all PCF85176 in the cascade is as equal as possible since otherwise synchronization artefacts may occur.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 15.
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PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 16. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that all normal precautions are taken as described in JESD625-A, IEC 61340-5 or equivalent standards. PCF85176 Product data sheet All information provided in this document is subject to legal disclaimers. Rev.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 17. Packing information 17.1 Tape and reel information For tape and reel packing information, see Ref. 10 “SOT357-1_518” and Ref. 11 “SOT364-1_118” on page 52. 18. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 18.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 18.3 Wave soldering Key characteristics in wave soldering are: • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 18.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 31. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 19.
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PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 21. Abbreviations Table 25.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 22.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 24. Legal information 24.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only.
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 26. Tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Ordering information . . . . . . . . . . . . . . . . . . . . .2 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . .2 Marking codes . . . . . . . . . .
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 27. Figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. Fig 15. Fig 16. Fig 17. Fig 18. Fig 19. Fig 20. Fig 21. Fig 22. Fig 23. Fig 24. Fig 25. Fig 26. Fig 27. Fig 28. Fig 29. Fig 30. Fig 31. Fig 32. Fig 33. Block diagram of PCF85176 . . . . . . . . . . . . . . . . .3 Pinning diagram for TQFP64 (PCF85176H) . . . . .4 Pinning diagram for TSSOP56 (PCF85176T) . . . .
PCF85176 NXP Semiconductors 40 x 4 universal LCD driver for low multiplex rates 28. Contents 1 2 3 3.1 4 5 6 6.1 6.2 7 7.1 7.1.1 7.1.2 7.1.3 7.1.4 7.1.5 7.1.5.1 7.2 7.3 7.3.1 7.3.2 7.3.3 7.3.3.1 7.3.4 7.3.4.1 7.3.4.2 7.3.4.3 7.3.4.4 7.4 7.4.1 7.4.2 7.4.3 7.5 7.5.1 7.5.2 7.6 7.6.1 7.6.2 7.6.3 7.6.4 7.6.5 7.6.5.1 7.6.5.2 7.6.5.3 8 8.1 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . .