Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsPMICsPMIC - display driver LCD 7 segments + DP, 14 segments + DP + AP, Dot matrix 10 chars

1. General description

The PCF8576D is a peripheral device which interfaces to almost any Liquid Crystal

Display (LCD)

with low multiplex rates. It generates the drive signals for any static or

multiplexed LCD containing up to four backplanes and up to 40 segments. It can be easily

cascaded for larger LCD applications. The PCF8576D is compatible with most

microcontrollers and communicates via the two-line bidirectional I

C-bus. Communication

overheads are minimized by a display RAM with auto-incremented addressing, by

hardware subaddressing and by display memory switching (static and duplex drive

modes).

• PCF8576DT/2 should not be used for new design-ins. Replacement part is

PCF85176T/1 for industrial applications

• PCF8576DT/S400/2 should not be used for new design-ins. Replacement part is

PCA85176T/Q900/1 for automotive applications

For a selection of NXP LCD segment drivers, see Table 30 on page 50

2. Features and benefits

 AEC-Q100 compliant (PCF8576DT/S400/2) for automotive applications

 Single chip LCD controller and driver

 Selectable backplane drive configuration: static or 2, 3, 4 backplane multiplexing

 Selectable display bias configuration: static,

⁄

, or

⁄

 Internal LCD bias generation with voltage-follower buffers

 40 segment drives:

 Up to 20 7-segment numeric characters

 Up to 10 14-segment alphanumeric characters

 Any graphics of up to 160 segments/elements

 40  4-bit RAM for display data storage

 Auto-incremented display data loading across device subaddress boundaries

 Display memory bank switching in static and duplex drive modes

 Versatile blinking modes

 Independent supplies possible for LCD and logic voltages

 Wide power supply range: from 1.8 V to 5.5 V

 Wide logic LCD supply range:

 From 2.5 V for low-threshold LCDs

 Up to 6.5 V for high-threshold twisted nematic LCDs

PCF8576D

40 × 4 universal LCD driver for low multiplex rates

Rev. 15 — 12 February 2015 Product data sheet

1. The definition of the abbreviations and acronyms used in this data sheet can be found in Section 22.

Summary of content (59 pages)

PAGE 1
PCF8576D 40 × 4 universal LCD driver for low multiplex rates Rev. 15 — 12 February 2015 Product data sheet 1. General description The PCF8576D is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD)1 with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 40 segments. It can be easily cascaded for larger LCD applications.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates       Low power consumption 400 kHz I2C-bus interface May be cascaded for large LCD applications (up to 2560 segments/elements possible) No external components required Compatible with chip-on-glass and chip-on-board technology Manufactured in silicon gate CMOS process 3. Ordering information Table 1.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 5. Block diagram %3 %3 %3 %3 6 WR 6 9/&' %$&.3/$1( 2873876 ',63/$< 6(*0(17 2873876 /&' 92/7$*( 6(/(&725 ',63/$< 5(*,67(5 ',63/$< &21752//(5 /&' %,$6 *(1(5$725 287387 %$1. 6(/(&7 $1' %/,1. &21752/ 966 &/. 6<1& &/2&. 6(/(&7 $1' 7,0,1* %/,1.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 6. Pinning information 6.1 Pinning %3 %3 %3 %3 9/&' 966 6 6$ 6 $ 6 $ 6 $ 6 26& 6 6 9'' &/.
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PCF8576D NXP Semiconductors 6 6 6 6 6 6 6 6 6 6 6 6 6 6 40 × 4 universal LCD driver for low multiplex rates 6 6 6 6 6 6 %3 6 %3 6 %3 6 %3 6 6 9/&' 6 6 6 966 6 6 6$ 6 $ 6 $ 6 6 6
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 6.2 Pin description Table 4. Pin description Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7. Functional description The PCF8576D is a versatile peripheral device designed to interface between any microcontroller to a wide variety of LCD segment or dot matrix displays (see Figure 4). It can directly drive any static or multiplexed LCD containing up to four backplanes and up to 40 segments. The possible display configurations of the PCF8576D depend on the number of active backplane outputs required.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 9'' 5 WU &% 9'' 9/&' 6'$ +267 0,&52 352&(6625 0,&52 &21752//(5 VHJPHQW GULYHV 6&/ 3&) ' 26& EDFNSODQHV $ $ $ /&' 3$1(/ XS WR HOHPHQWV 6$ 966 966 PGE The resistance of the power lines must be kept to a minimum. For chip-on-glass applications, due to the Indium Tin Oxide (ITO) track resistance, each supply line must be routed separately between the chip and the connector. Fig 5.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7.3 LCD voltage selector The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the selected LCD drive configuration. The operation of the voltage selector is controlled by the mode-set command from the command decoder.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates V on  RMS  D = ----------------------- = V off  RMS  2 a + 2a + n --------------------------2 a – 2a + n (3) Using Equation 3, the discrimination for an LCD drive mode of 1:3 multiplex with 1⁄ 2 bias is 1⁄ 2 21 bias is ---------- = 1.528 . 3 3 = 1.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 5HODWLYH 7UDQVPLVVLRQ 9WK RII 2)) 6(*0(17 9WK RQ *5(< 6(*0(17 9506 >9@ 21 6(*0(17 DDD Fig 6. PCF8576D Product data sheet Electro-optical characteristic: relative transmission curve of the liquid All information provided in this document is subject to legal disclaimers. Rev. 15 — 12 February 2015 © NXP Semiconductors N.V. 2015. All rights reserved.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7.4 LCD drive mode waveforms 7.4.1 Static drive mode The static LCD drive mode is used when a single backplane is provided in the LCD. The backplane (BPn) and segment drive (Sn) waveforms for this mode are shown in Figure 7.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7.4.2 1:2 Multiplex drive mode The 1:2 multiplex drive mode is used when two backplanes are provided in the LCD. This mode allows fractional LCD bias voltages of 1⁄2 bias or 1⁄3 bias as shown in Figure 8 and Figure 9.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7IU 9/&' %3 %3 /&' VHJPHQWV 9/&' 9/&' 966 VWDWH 9/&' 9/&' VWDWH 9/&' 966 9/&' 6Q 9/&' 9/&' 966 9/&' 6Q 9/&' 9/&' 966 D :DYHIRUPV DW GULYHU 9/&' 9/&' VWDWH 9/&' 9 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' VWDWH 9 9/&' 9/&' 9/&' E 5HVXOWDQW ZDYHIRUPV DW /&' VHJPHQW PJO (1) Vstate1(t) = VSn(t)  VBP0(t).
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7.4.3 1:3 Multiplex drive mode When three backplanes are provided in the LCD, the 1:3 multiplex drive mode applies (see Figure 10).
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7.4.4 1:4 Multiplex drive mode When four backplanes are provided in the LCD, the 1:4 multiplex drive mode applies (see Figure 11).
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7.5 Oscillator 7.5.1 Internal clock The internal logic of the PCF8576D and its LCD drive signals are timed either by its internal oscillator or by an external clock. The internal oscillator is enabled by connecting pin OSC to pin VSS. If the internal oscillator is used, the output from pin CLK can be used as the clock signal for several PCF8576Ds in the system that are connected in cascade. 7.5.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates • In 1:3 multiplex drive mode, BP3 carries the same signal as BP1, therefore these two adjacent outputs can be tied together to give enhanced drive capabilities. • In 1:2 multiplex drive mode, BP0 and BP2, respectively, BP1 and BP3 all carry the same signals and may also be paired to increase the drive capabilities.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates The following applies to Figure 13: • In static drive mode the eight transmitted data bits are placed into row 0 as one byte. • In 1:2 multiplex drive mode the eight transmitted data bits are placed in pairs into row 0 and 1 as four successive 2-bit RAM words.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7.10.3 RAM writing in 1:3 multiplex drive mode In 1:3 multiplex drive mode, the RAM is written as shown in Table 7 (see Figure 13 as well). Table 7. Standard RAM filling in 1:3 multiplex drive mode Assumption: BP2/S2, BP2/S5, BP2/S8 etc. are not connected to any segments/elements on the display.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7.10.5 Output bank selector The output bank selector (see Table 15) selects one of the four rows per display RAM address for transfer to the display register. The actual row selected depends on the selected LCD drive mode in operation and on the instant in the multiplex sequence.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Table 9. Blinking frequencies Blink mode Normal operating mode ratio Nominal blink frequency[1] off - blinking off 1 f clk --------768 2 Hz 2 f clk -----------1536 1 Hz 3 f clk -----------3072 0.5 Hz [1] Blink modes 1, 2 and 3 and the nominal blink frequencies 0.5 Hz, 1 Hz and 2 Hz correspond to an oscillator frequency (fclk) of 1536 Hz (see Section 13). 7.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Table 12.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Table 15. Bank-select command bit description See Section 7.10.5 and Section 7.10.6.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 8. Characteristics of the I2C-bus The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 0$67(5 75$160,77(5 5(&(,9(5 6/$9( 75$160,77(5 5(&(,9(5 6/$9( 5(&(,9(5 0$67(5 75$160,77(5 5(&(,9(5 0$67(5 75$160,77(5 6'$ 6&/ PJD Fig 16. System configuration 8.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge cycle.
PAGE 28
PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 8.5 I2C-bus controller The PCF8576D acts as an I2C-bus slave receiver. It does not initiate I2C-bus transfers or transmit data to an I2C-bus master receiver. The only data output from the PCF8576D are the acknowledge signals of the selected devices. Device selection depends on the I2C-bus slave address, on the transferred command data and on the hardware subaddress.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates DFNQRZOHGJH E\ $ $ DQG $ VHOHFWHG 3&) ' RQO\ DFNQRZOHGJH E\ DOO DGGUHVVHG 3&) 'V 5 : VODYH DGGUHVV 6 6 $ $ & &200$1' $ ',63/$< '$7$ Q E\WH V E\WH $ 3 Q E\WH V XSGDWH GDWD SRLQWHUV DQG LI QHFHVVDU\ VXEDGGUHVV FRXQWHU PGE Fig 18. I2C-bus protocol After an acknowledgement, one or more command bytes follow, that define the status of each addressed PCF8576D.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 9. Internal circuitry 9'' 9'' 966 966 6$ 9'' &/. 6&/ 966 9'' 966 26& 966 9'' 6'$ 6<1& 966 966 9'' $ $ 7 966 9/&' %3 %3 %3 %3 966 9/&' 9/&' 6 WR 6 966 966 PGE Fig 20. Device protection circuits PCF8576D Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 15 — 12 February 2015 © NXP Semiconductors N.V. 2015. All rights reserved.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 10. Safety notes CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling electrostatic sensitive devices. Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or equivalent standards. CAUTION Static voltages across the liquid crystal display can build up when the LCD supply voltage (VLCD) is on while the IC supply voltage (VDD) is off, or vice versa.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 11. Limiting values Table 18. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDD supply voltage 0.5 +6.5 V VLCD LCD supply voltage 0.5 +7.5 V VI input voltage on each of the pins CLK, SDA, SCL, SYNC, SA0, OSC, A0 to A2 0.5 +6.5 V VO output voltage on each of the pins S0 to S39, BP0 to BP3 0.5 +7.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 12. Static characteristics Table 19. Static characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Supplies VDD supply voltage 1.8 - 5.5 V VLCD LCD supply voltage [1] 2.5 - 6.5 V supply current [2] - 3.5 7 A - 2.7 - A - 23 32 A - 13 - A 1.0 1.3 1.6 V VSS - 0.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 13. Dynamic characteristics Table 20. Dynamic characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 6.5 V; Tamb = 40 C to +85 C; unless otherwise specified.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates I&/. WFON + WFON / 9'' &/. 9'' 9'' 6<1& 9'' W3' 6<1&B1 W6<1&B1/ 9 %3 WR %3 DQG 6 WR 6 9'' 9 9 W3' GUY DDL Fig 21. Driver timing waveforms 6'$ W%8) W/2: WI 6&/ W+' 67$ WU W+' '$7 W+,*+ W68 '$7 6'$ W68 67$ W68 672 PJD Fig 22. I2C-bus timing waveforms 14. Application information 14.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Table 21. Addressing cascaded PCF8576D Cluster Bit SA0 Pin A2 Pin A1 Pin A0 Device 1 0 0 0 0 0 0 0 1 1 0 1 0 2 0 1 1 3 1 0 0 4 1 0 1 5 1 1 0 6 1 1 1 7 0 0 0 8 0 0 1 9 0 1 0 10 0 1 1 11 1 0 0 12 1 0 1 13 1 1 0 14 1 1 1 15 2 1 PCF8576Ds connected in cascade are synchronized to allow the backplane signals from only one device in the cascade to be shared.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Table 22. SYNC contact resistance Number of devices Maximum contact resistance 2 6 k 3 to 5 2.2 k 6 to 10 1.2 k 10 to 16 700  The PCF8576D can be cascaded with the PCF8562. This allows optimal drive selection for a given number of pixels to display. Figure 21 and Figure 22 show the timing of the synchronization signals.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 7IU IIU %3 6<1& D VWDWLF GULYH PRGH %3 ELDV %3 ELDV 6<1& E PXOWLSOH[ GULYH PRGH %3 ELDV 6<1& F PXOWLSOH[ GULYH PRGH %3 ELDV 6<1& G PXOWLSOH[ GULYH PRGH PJO Fig 24. Synchronization of the cascade for the various PCF8576D drive modes 15. Test information The following quality information corresponds with the product type: PCF8576DT/S400/2 15.
PAGE 39
PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 16.
PAGE 40
PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 17. Bare die outline :LUH ERQG GLH ERQGLQJ SDGV 3&) '8 '$ ' $ H [ ( \ ; & & 3 3 3 3 GHWDLO ; PP VFDOH 1RWHV 0DUNLQJ FRGH 3& ' SFI GXBGDBGR 5HIHUHQFHV 2XWOLQH YHUVLRQ ,(& -('(& -(,7$ 3&) '8 '$ (XURSHDQ SURMHFWLRQ ,VVXH GDWH Fig 26.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates %DUH GLH EXPSV 3&) '8 '$ ' < H [ ( \ & & ; / $ E GHWDLO ; $ $ GHWDLO < PP VFDOH 1RWHV 0DUNLQJ FRGH 3& ' SFI GXB GDBGR 5HIHUHQFHV 2XWOLQH YHUVLRQ ,(& -('(& -(,7$ 3&) '8 '$ (XURSHDQ SURMHFWLRQ ,VVXH GDWH Fig 27.
PAGE 42
PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Table 23. Dimensions of PCF8576DU/DA Original dimensions are in mm. Unit (mm) A D max - - - nom 0.38 2.2 2.0 min - - - [1] Dimension not drawn to scale. [2] Pad size. [3] Passivation opening. P1[2] P2[3] P3[2] - - - - - - 0.09 0.08 0.066 0.056 0.072 - - - - e[1] E P4[3] Table 24. Dimensions of PCF8576DU/2DA Original dimensions are in mm.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Table 25. Bonding pad location for PCF8576DU/x …continued All x/y coordinates represent the position of the center of each pad with respect to the center (x/y = 0) of the chip (see Figure 3, Figure 26 and Figure 27). PCF8576D Product data sheet Symbol Pad X (m) Y (m) Description S4 22 347.22 876.6 LCD segment outputs S5 23 263.97 876.6 S6 24 180.72 876.6 S7 25 97.47 876.6 S8 26 14.22 876.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Table 26. Alignment marks All x/y coordinates represent the position of the center of each alignment mark with respect to the center (x/y = 0) of the chip (see Figure 3, Figure 26 and Figure 27). Symbol Location Dimension X (m) Y (m) Diameter (m) C1 930.42 870.3 72 C2 829.98 870.3 72 18.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 19. Packing information 19.1 Tray information & - $ + [ % $ $ . ) ( ' \ \ [ * ) ( & 2 1 / 0 6(&7,21 $ $ ; 'LPHQVLRQV LQ PP GHWDLO ; DDD Fig 28. Tray details PCF8576D Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 15 — 12 February 2015 © NXP Semiconductors N.V. 2015. All rights reserved.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Table 27. Description of tray details Tray details are shown in Figure 28. Tray details Dimensions A B C D E F G H J K L M N Unit 3.6 3.6 2.36 2.11 50.8 45.72 39.6 5.6 5.6 39.6 3.96 2.18 2.49 mm Number of pockets x direction y direction 12 12 PDUNLQJ FRGH DDD Fig 29. Tray alignment 19.2 Tape and reel information For tape and reel packing information, please see Ref.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 20. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 20.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits.
PAGE 48
PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 20.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 30. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”.
PAGE 50
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 22. Abbreviations Table 31.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 23.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 24. Revision history Table 32. Revision history Document ID Release date Data sheet status Change notice Supersedes PCF8576D v.15 20150212 Product data sheet - PCF8576D v.14 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • • • Legal texts have been adapted to the new company name where appropriate.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 25. Legal information 25.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 27. Tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Ordering information . . . . . . . . . . . . . . . . . . . . .2 Ordering options . . . . . . . . . . . . .
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 28. Figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. Fig 15. Fig 16. Fig 17. Fig 18. Fig 19. Fig 20. Fig 21. Fig 22. Fig 23. Fig 24. Fig 25. Fig 26. Fig 27. Fig 28. Fig 29. Fig 30. Block diagram of PCF8576D . . . . . . . . . . . . . . . . .3 Pinning diagram for PCF8576DT (TSSOP56) . . . .4 Pinning diagram for PCF8576DU (bare die) . . . . .
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PCF8576D NXP Semiconductors 40 × 4 universal LCD driver for low multiplex rates 29. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . .