Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsPMICsPMIC - display driver LCD Dot matrix I²C 6 µA TQFP 64

1. General description

The PCF8578 is a low power CMOS

LCD row and column driver, designed to drive dot

matrix graphic displays at multiplex rates of 1:8, 1:16, 1:24 or 1:32. The device has

40 outputs, of which 24 are programmable and conﬁgurable for the following ratios of

rows/columns:

⁄

. The PCF8578 can function as a stand-alone LCD

controller and driver for use in small systems. For larger systems it can be used in

conjunction with up to 32 PCF8579s for which it has been optimized. Together these two

devices form a general purpose LCD dot matrix driver chip set, capable of driving displays

of up to 40960 dots. The PCF8578 is compatible with most microcontrollers and

communicates via a two-line bidirectional bus (I

C-bus). Communication overhead is

minimized by a display RAM with auto-incremented addressing and display bank

switching.

2. Features

n Single chip LCD controller and driver

n Stand-alone or may be used with up to 32 PCF8579s (40960 dots possible)

n 40 driver outputs, conﬁgurable for several ratios of rows/columns:

⁄

n Selectable multiplex rates: 1:8, 1:16, 1:24 or 1:32

n Externally selectable bias conﬁguration, 5 or 6 levels

n 1280-bit RAM for display data storage and scratch pad

n Display memory bank switching

n Auto-incremented data loading across hardware subaddress boundaries (with

PCF8579)

n Provides display synchronization for PCF8579

n On-chip oscillator, requires only 1 external resistor

n Power-On Reset (POR) blanks display

n Logic voltage supply range 2.5 V to 6 V

n Maximum LCD supply voltage 9 V

n Low power consumption

n I

C-bus interface

n Compatible with most microcontrollers

n Optimized pinning for single plane wiring in multiple device applications (with

PCF8579)

n Space saving 56-lead small outline package and 64 pin quad ﬂat pack

PCF8578

LCD row/column driver for dot matrix graphic displays

Rev. 06 — 5 May 2009 Product data sheet

1. The deﬁnition of the abbreviations and acronyms used in this data sheet can be found in Section 15.

Summary of content (46 pages)

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PCF8578 LCD row/column driver for dot matrix graphic displays Rev. 06 — 5 May 2009 Product data sheet 1. General description The PCF8578 is a low power CMOS1 LCD row and column driver, designed to drive dot matrix graphic displays at multiplex rates of 1:8, 1:16, 1:24 or 1:32. The device has 40 outputs, of which 24 are programmable and configurable for the following ratios of rows/columns: 32⁄8, 24⁄16, 16⁄24 or 8⁄32.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 3. Applications n n n n n Automotive information systems Telecommunication systems Point-of-sale terminals Industrial computer terminals Instrumentation 4. Ordering information Table 1. Ordering information Type number Package Name Description PCF8578T/1 VSO56 plastic very small outline package; 56 leads SOT190-1 PCF8578H/1 LQFP64 plastic low profile quad flat package; 64 leads; body 10 × 10 × 1.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 6.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 7. Pinning information 7.1 Pinning SDA 1 56 R0 SCL 2 55 R1 SYNC 3 54 R2 CLK 4 53 R3 VSS 5 52 R4 TEST 6 51 R5 SA0 7 50 R6 OSC 8 49 R7 VDD 9 48 R8/C8 V2 10 47 R9/C9 V3 11 46 R10/C10 V4 12 45 R11/C11 V5 13 44 R12/C12 VLCD 14 n.c. 15 43 R13/C13 PCF8578T 42 R14/C14 n.c.
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PCF8578 NXP Semiconductors 49 R21/C21 50 R20/C20 51 R19/C19 52 R18/C18 53 R17/C17 54 R16/C16 55 R15/C15 56 R14/C14 57 R13/C13 58 R12/C12 59 R11/C11 60 R10/C10 61 R9/C9 62 R8/C8 63 R7 64 R6 LCD row/column driver for dot matrix graphic displays R5 1 48 R22/C22 R4 2 47 n.c.
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PCF8578 NXP Semiconductors 49 R21/C21 50 R20/C20 51 R19/C19 52 R18/C18 53 R17/C17 54 R16/C16 55 R15/C15 56 R14/C14 57 R13/C13 58 R12/C12 59 R11/C11 60 R10/C10 61 R9/C9 62 R8/C8 63 R7 64 R6 LCD row/column driver for dot matrix graphic displays R5 1 48 R22/C22 R4 2 47 n.c.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 7.2 Pin description Table 3.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 8. Functional description 8.1 Display configurations The PCF8578 row and column driver is designed for use in one of three ways: • Stand-alone row and column driver for small displays (mixed mode) • Row and column driver with cascaded PCF8579s (mixed mode) • Row driver with cascaded PCF8579s (mixed mode and row mode) Table 4.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays Table 5 shows the relative values of the resistors required in the configuration of Figure 5 to produce the standard multiplex rates. Table 5. Multiplex rates and resistor values for Figure 5 Resistors Multiplex rate (1:n) n=8 n = 16, 24, 32 R1 R R R2 ( n – 2 )R ( 3 – n )R R R3 ( n – 3 )R 8.2 Power-on reset At power-on the PCF8578 resets to a defined starting condition as follows: 1. Display blank 2.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays where the values for n are determined by the multiplex rate (1:n). Valid values for n are: n = 8 for 1:8 multiplex n = 16 for 1:16 multiplex n = 24 for 1:24 multiplex n = 32 for 1:32 multiplex Table 6. Optimum LCD voltages Bias ratios Multiplex rate 1:8 1:16 1:24 1:32 V2 -------------V oper 0.739 0.800 0.830 0.850 V3 -------------V oper 0.522 0.600 0.661 0.700 V4 -------------V oper 0.478 0.400 0.339 0.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays msa838 1.0 Vbias Voper V2/Voper 0.8 V3/Voper 0.6 V4/Voper 0.4 V5/Voper 0.2 0 1:8 1:16 1:24 1:32 multiplex rate Vbias = V2, V3, V4, V5; see Table 6. Fig 6. Vbias/Voper as a function of the multiplex rate PCF8578_6 Product data sheet © NXP B.V. 2009. All rights reserved. Rev.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 8.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays Tfr ROW 1 R1 (t) VDD V2 V3 V4 V5 VLCD ROW 2 R2 (t) VDD V2 V3 V4 V5 VLCD COL 1 C1 (t) VDD V2 V3 V4 V5 VLCD COL 2 C2 (t) VDD V2 V3 V4 V5 VLCD state 1 (OFF) state 2 (ON) dot matrix 1:8 multiplex rate Voper 0.261 Voper Vstate 1(t) 0V 0.261 Voper Voper Voper 0.478 Voper 0.261 Voper Vstate 2(t) 0V 0.261 Voper 0.478 Voper Voper msa840 Vstate1(t) = C1(t) − R1(t).
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays state 1 (OFF) state 2 (ON) Tfr ROW 1 R1 (t) VDD V2 V3 V4 V5 VLCD ROW 2 R2 (t) VDD V2 V3 V4 V5 VLCD COL 1 C1 (t) VDD V2 V3 V4 V5 VLCD COL 2 C2 (t) dot matrix 1:16 multiplex rate VDD V2 V3 V4 V5 VLCD Voper Vstate 1(t) 0.2 Voper 0V 0.2 Voper Voper Voper 0.6 Voper Vstate 2(t) 0.2 Voper 0V 0.2 Voper 0.6 Voper Voper msa836 Vstate1(t) = C1(t) − R1(t).
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 8.5 Oscillator 8.5.1 Internal clock The clock signal for the system may be generated by the internal oscillator and prescaler. The frequency is determined by the value of the resistor Rext(OSC), see Figure 10. For normal use a value of 330 kΩ is recommended.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 8.7 Row and column drivers Outputs R0 to R7 and C32 to C39 are fixed as row and column drivers respectively. The remaining 24 outputs R8/C8 to R31/C31 are programmable and may be configured (in blocks of 8) to be either row or column drivers. The row select signal is produced sequentially at each output from R0 up to the number defined by the multiplex rate (see Table 4).
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 8.8.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays clock pulse for acknowledgement START condition SCL FROM MASTER 1 2 9 8 DATA OUTPUT BY TRANSMITTER S DATA OUTPUT BY RECEIVER mba606 The general characteristics and detailed specification of the I2C-bus are available on request. Fig 14. Acknowledgement on the I2C-bus 8.8.5 I2C-bus controller The I2C-bus controller detects the I2C-bus protocol, slave address, commands and display data bytes.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays acknowledge by A0, A1, A2 and A3 selected PCF8578s / PCF8579s only acknowledge by all addressed PCF8578s / PCF8579s R/ W slave address S 0 1 1 1 1 0 A 0 A C 0 S A COMMAND DISPLAY DATA n ≥ 0 byte(s) 1 byte A P n ≥ 0 byte(s) update data pointers and if necessary, subaddress counter (a) msa830 a.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays master receiver must signal an end of data to the slave transmitter, by not generating an acknowledge on the last byte clocked out of the slave. The slave transmitter then leaves the data line HIGH, enabling the master to generate a STOP condition (P). Display bytes are written into, or read from the RAM at the address specified by the data pointer and subaddress counter.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays Table 10. C bit description Bit Symbol 7 C Value Description continue bit 0 last control byte in the transfer; next byte will be regarded as display data 1 control bytes continue; next byte will be a command too MSB C LSB REST OF OPCODE msa833 C = 0; last command. C = 1; commands continue. Fig 16. General information of command byte Table 11.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays Table 12. Set-start-bank - command bit description Bit Symbol Value Description 7 C 0, 1 see Table 10 6 to 2 - 11111 1, 0 B[1:0] [1] fixed value start bank pointer (see Figure 20)[1] 00 bank 0 01 bank 1 10 bank 2 11 bank 3 Useful for scrolling, pseudo-motion and background preparation of new display content. Table 13.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays Table 15. Load-X-address - command bit description Bit Symbol Value Description 7 C 0, 1 see Table 10 6 - 0 fixed value 5 to 0 X[5:0] 0 to 39[1] RAM column address; six bits of immediate data, transferred to the X-address pointer to define one of forty display RAM columns (see Figure 17) [1] Values shown in decimal. 8.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 8.12 Display control The display is generated by continuously shifting rows of RAM data to the dot matrix LCD via the column outputs. The number of rows scanned depends on the multiplex rate set by bits M[1:0] of the set-mode command. RAM bank 0 top of LCD bank 1 LCD bank 2 bank 3 msa851 1:32 multiplex rate and start bank = 2. Fig 20.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays The display status (all dots on or off and normal or inverse video) is set by the bits E[1:0] of the set-mode command. For bank switching, the RAM bank corresponding to the top of the display is set by the bits B[1:0] of the set-start-bank command. This is shown in Figure 20. This feature is useful when scrolling in alphanumeric applications. 9. Limiting values Table 16.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 10. Static characteristics Table 17. Static characteristics VDD = 2.5 V to 6 V; VSS = 0 V; VLCD = VDD − 3.5 V to VDD − 9 V; Tamb = −40 °C to +85 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Supplies VDD supply voltage 2.5 - 6.0 V VLCD LCD supply voltage VDD − 9 - VDD − 3.5 V IDD supply current - 6 15 µA - 20 50 µA 0.8 1.3 1.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 11. Dynamic characteristics Table 18. Dynamic characteristics All timing values are referenced to VIH and VIL levels with an input voltage swing of VSS to VDD. VDD = 2.5 V to 6 V; VSS = 0 V; VLCD = VDD − 3.5 V to VDD − 9 V; Tamb = −40 °C to +85 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit fclk clock frequency at multiplex rate 1:8, 1:16 and 1:32; Rext(OSC) = 330 kΩ; VDD = 6 V 1.2 2.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 1/fclk 0.7 VDD CLK 0.3 VDD 0.7 VDD SYNC 0.3 VDD tPD(SYNC_N) tPD(SYNC_N) 0.5 V C39 to C32, R31/C31 to R8/C8 and R7 to R0 (VDD − VLCD = 9 V) 0.5 V tPD(drv) msa834 Fig 21. Driver timing waveforms SDA tBUF tLOW tf SCL tHD;STA tr tHD;DAT tHIGH tSU;DAT SDA tSU;STA tSU;STO mga728 Fig 22. I2C-bus timing waveforms PCF8578_6 Product data sheet © NXP B.V. 2009. All rights reserved. Rev.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays PCF8578: Segment Driver Application a R0 f R7 b g e one line of 24 digits 7 segment one line of 12 digits star-burst (mux 1:16) Total: 384 segments c dp d LCD R8 R15 12 1 (Using 1:16 mux, the first character data must be loaded in bank 0 and 1 starting at byte number 16) C16 16 0 C17 C39 17 39 Bank 0 EE R AM 1 ALTERNATE DISPLAY BANK FR DISPLAY RAM PCF8578 a LSB b f g c e d dp MSB ALTERNATE DISP
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 13. Package outline VSO56: plastic very small outline package; 56 leads SOT190-1 D E A X c y HE v M A Z 56 29 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 detail X 28 w M bp e 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 3.3 0.3 0.1 3.0 2.8 0.25 0.42 0.30 0.22 0.14 21.65 21.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays LQFP64: plastic low profile quad flat package; 64 leads; body 10 x 10 x 1.4 mm SOT314-2 c y X A 48 33 49 32 ZE e E HE A A2 (A 3) A1 wM θ bp pin 1 index 64 Lp L 17 detail X 16 1 ZD e v M A wM bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.6 0.20 0.05 1.45 1.35 0.25 0.27 0.17 0.18 0.12 10.1 9.9 10.1 9.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays TQFP64: plastic thin quad flat package; 64 leads; body 10 x 10 x 1.0 mm SOT357-1 c y X A 48 33 49 32 ZE e E HE A (A 3) A2 A 1 wM pin 1 index θ bp 64 Lp L 17 detail X 16 1 ZD e v M A wM bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.2 0.15 0.05 1.05 0.95 0.25 0.27 0.17 0.18 0.12 10.1 9.9 10.1 9.9 0.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 14.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 32. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 15. Abbreviations Table 21.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 16. Revision history Table 22. Revision history Document ID Release date Data sheet status Change notice Supersedes PCF8578_6 20090505 Product data sheet - PCF8578_5 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • • • • • Legal texts have been adapted to the new company name where appropriate.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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PCF8578 NXP Semiconductors LCD row/column driver for dot matrix graphic displays 19. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 8.2 8.3 8.4 8.5 8.5.1 8.5.2 8.6 8.7 8.8 8.8.1 8.8.2 8.8.3 8.8.4 8.8.5 8.8.6 8.8.7 8.9 8.9.1 8.9.2 8.10 8.11 8.12 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .