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1. General description

The PCU9656 is a UFm I

C-bus controlled 24-bit LED driver optimized for voltage switch

dimming and blinking 100 mA Red/Green/Blue/Amber (RGBA) LEDs. Each LEDn output

has its own 8-bit resolution (256 steps) fixed frequency individual PWM controller that

operates at 97 kHz (typical) with a duty cycle that is adjustable from 0 % to 99.6 % to

allow the LED to be set to a specific brightness value. An additional 8-bit resolution (256

steps) group PWM controller has both a frequency of 190 Hz and an adjustable frequency

between 24 Hz to once every 10.73 seconds with a duty cycle that is adjustable from 0 %

to 99.6 % that is used to either dim or blink all LEDs with the same value.

Each LEDn output can be off, on (no PWM control), set at its individual PWM controller

value or at both individual and group PWM controller values. The PCU9656 operates with

a supply voltage range of 2.3 V to 5.5 V and the 100 mA open-drain outputs allow

voltages up to 40 V for the LED supply.

The PCU9656 is one of the first LED controller devices in a new Ultra Fast-mode (UFm)

family. UFm devices offer higher frequency (up to 5 MHz).

The active LOW Output Enable input pin (OE

) blinks all the LEDn outputs and can be

used to externally PWM the outputs, which is useful when multiple devices need to be

dimmed or blinked together without using software control.

Software programmable LED Group and three Sub Call I

C-bus addresses allow all or

defined groups of PCU9656 devices to respond to a common I

C-bus address, allowing

for example, all red LEDs to be turned on or off at the same time or marquee chasing

effect, thus minimizing I

C-bus commands. Six hardware address pins allow up to

64 devices on the same bus.

The Software Reset (SWRST) Call allows the master to perform a reset of the PCU9656

through the I

C-bus, identical to the Power-On Reset (POR) that initializes the registers to

their default state causing the output NAND FETs to be OFF (LED off). This allows an

easy and quick way to reconfigure all device registers to the same condition.

A new feature to control LEDn output pattern is incorporated in the PCU9656. A new

control byte called ‘Chase Byte’ allows enabling or disabling of selective LEDn outputs

depending on the value of the Chase Byte. This feature greatly reduces the number of

bytes to be sent to the PCU9656 when repetitive patterns need to be displayed as in

creating a marquee chasing effect.

PCU9656

24-bit UFm 5 MHz I

C-bus 100 mA 40 V LED driver

Rev. 1 — 8 December 2011 Product data sheet

Summary of content (45 pages)

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PCU9656 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver Rev. 1 — 8 December 2011 Product data sheet 1. General description The PCU9656 is a UFm I2C-bus controlled 24-bit LED driver optimized for voltage switch dimming and blinking 100 mA Red/Green/Blue/Amber (RGBA) LEDs. Each LEDn output has its own 8-bit resolution (256 steps) fixed frequency individual PWM controller that operates at 97 kHz (typical) with a duty cycle that is adjustable from 0 % to 99.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 2. Features and benefits  24 LED drivers.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 3. Applications      RGB or RGBA LED drivers LED status information LED displays LCD backlights Keypad backlights for cellular phones or handheld devices 4. Ordering information Table 1. Ordering information Type number Topside mark PCU9656B PCU9656 Package Name Description Version LQFP48 plastic low profile quad flat package; 48 leads; body 7  7  1.4 mm SOT313-2 5.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 6. Pinning information 37 VSS 38 USCL 39 USDA 40 VDD 41 LED20 42 LED21 43 LED22 44 LED23 45 VSS 46 A0 47 A1 48 VSS 6.1 Pinning VSS 1 36 VSS LED0 2 35 LED19 LED1 3 34 LED18 LED2 4 33 LED17 LED3 5 32 LED16 VSS 6 VSS 7 LED4 8 29 LED15 LED5 9 28 LED14 LED6 10 27 LED13 LED7 11 26 LED12 31 VSS PCU9656B 30 VSS VSS 12 Fig 2. OE 24 n.c.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver Table 2. PCU9656 Product data sheet Pin description …continued Symbol Pin Type Description LED11 20 O LED driver 11 A5 22 I address input 5 n.c.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7. Functional description Refer to Figure 1 “Block diagram of PCU9656”. 7.1 Device addresses Following a START condition, the bus master must output the address of the slave it is accessing. There are a maximum of 64 possible programmable addresses using the six hardware address pins. One of these addresses cannot be used as it is reserved for Software Reset (SWRST), leaving a maximum of 63 addresses.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7.1.2 LED All Call UFm I2C-bus address • Default power-up value (ALLCALLADR register): E0h or 1110 000 • Programmable through I2C-bus (volatile programming) • At power-up, LED All Call I2C-bus address is enabled See Section 7.3.9 “ALLCALLADR, LED All Call UFm I2C-bus address” for more detail.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7.2 Control register Following the slave address, LED All Call address or LED Sub Call address, the bus master will send a byte to the PCU9656, which will be stored in the Control register. The lowest 6 bits are used as a pointer to determine which register will be accessed (D[5:0]). The highest bit is used as Auto-Increment Flag (AIF). This bit along with the MODE1 register bit 5 and bit 6 provide the Auto-Increment feature.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver AIF + AI[1:0] = 101b is used when the 24 LED drivers must be individually programmed with different values during the same I2C-bus communication, for example, changing color setting to another color setting. AIF + AI[1:0] = 110b is used when the LED drivers must be globally programmed with different settings during the same I2C-bus communication, for example, global brightness or blinking change.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver Table 4.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7.3.1 Mode register 1, MODE1 Table 5. MODE1 - Mode register 1 (address 00h) bit description Legend: * default value. Bit Symbol Access Value Description 7 AIF not user programmable 0 Register Auto-Increment disabled. 1* Register Auto-Increment enabled (write default logic 1). W 0* Auto-Increment bit 1 = 0. Auto-increment range as defined in Table 3. 1 Auto-Increment bit 1 = 1.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7.3.3 PWM0 to PWM23, individual brightness control Table 7. PWM0 to PWM23 - PWM registers 0 to 23 (address 02h to 19h) bit description Legend: * default value.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7.3.4 GRPPWM, group duty cycle control Table 8. GRPPWM - Group brightness control register (address 1Ah) bit description Legend: * default value Address Register Bit Symbol Access Value Description 1Ah GRPPWM 7:0 GDC[7:0] W 1111 1111* GRPPWM register When DMBLNK bit (MODE2 register) is programmed with logic 0, a 190 Hz typical frequency signal is superimposed with the 97 kHz individual brightness control signal.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7.3.6 CHASE control Table 10. CHASE - Chase pattern control register (address 1Ch) bit description Legend: * default value. Address Register Bit Symbol Access Value Description 1Ch CHASE 7:0 CHC[7:0] W 0000 0000* CHASE register CHASE is used to program the LEDn output ON/OFF pattern. The contents of the CHASE register is used to enable one of the LEDn output patterns, as indicated in Table 11.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7.3.7 LEDOUT0 to LEDOUT5, LED driver output state Table 12. LEDOUT0 to LEDOUT5 - LED driver output state register (address 1Dh to 22h) bit description Legend: * default value.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7.3.8 SUBADR1 to SUBADR3, UFm I2C-bus subaddress 1 to 3 SUBADR1 to SUBADR3 - UFm I2C-bus subaddress registers 1 to 3 (address 23h to 25h) bit description Legend: * default value. Table 13.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 7.4 Active LOW output enable input The active LOW output enable (OE) pin, allows to enable or disable all the LEDn outputs at the same time. • When a LOW level is applied to OE pin, all the LEDn outputs are enabled as defined by the CHASE register. • When a HIGH level is applied to OE pin, all the LEDn outputs are high-impedance.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 5. Once the right 2 bytes (SWRST data byte 1 and byte 2 only) have been sent, the master sends a STOP command to end the SWRST Call: the PCU9656 then resets to the default value (power-up value) and is ready to be addressed again within the specified bus free time (tBUF). Remark: The reset stage is also the standby state with the internal oscillator turned off.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 8. Characteristics of the PCU9656 Ultra Fast-mode I2C-bus The PCU9656 LED controller uses the new Ultra Fast-mode (UFm) I2C-bus to communicate with the UFm I2C-bus capable host controller. It uses two lines for communication. They are a serial data line (USDA) and a serial clock line (USCL). The UFm is a unidirectional bus that is capable of higher frequency (up to 5 MHz).
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 8.2 System configuration A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The device that controls the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’ (see Figure 9). USDA MASTER UFm TRANSMITTER USCL SLAVE UFm RECEIVER SLAVE UFm RECEIVER SLAVE UFm RECEIVER 002aaf100 Fig 9. System configuration 8.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 9. Bus transactions control register(1) slave address S 0 A5 A4 A3 A2 A1 A0 0 START condition data for register D[7:0] 1 AIF 0 D5 D4 D3 D2 D1 D0 1 register address(1) W Auto-Increment flag 1 this bit always = 1 P this bit always = 1 this bit always = 1 STOP condition 002aag251 (1) See Table 4 for register definition. Fig 11.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver slave address(1) sequence (A) S new LED All Call UFm I2C address(2) control register 0 A5 A4 A3 A2 A1 A0 0 START condition 1 1 0 1 0 0 1 1 0 ALLCALLADR register selection W this bit always = 1 1 1 0 1 0 1 0 this bit always = 1 1 0 1 P this bit always = 1 Auto-Increment on STOP condition LED[3:0] are on at the ninth bit(3) LED All Call UFm I2C address sequence (B) S 1 0 1 0 START condition 1 0
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 10. Application design-in information up to 40 V VDD = 2.5 V, 3.3 V or 5.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 10.1 Junction temperature calculation A device junction temperature can be calculated when the ambient temperature or the case temperature is known. When the ambient temperature is known, the junction temperature is calculated using Equation 4 and the ambient temperature, junction to ambient thermal resistance and power dissipation.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 10.1.1 Example 1: Tj calculation when Tamb is known (PCU9656B, LQFP48) Rth(j-a) = 63 C/W Tamb = 50 C LEDn output low voltage (LED VOL) = 0.5 V LEDn output current per channel = 80 mA Number of outputs = 24 IDD(max) = 18 mA VDD(max) = 5.5 V 1. Find Ptot (device total power dissipation): – output total power = 80 mA  24  0.5 V = 960 mW – chip core power consumption = 18 mA  5.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 1. Find Ptot (device total power dissipation) – output current (60 mA  1 port); output power (60 mA  1  0.5 V) = 30 mW – output current (50 mA  6 ports); output power (50 mA  6  0.5 V) = 150 mW – output current (40 mA  2 ports); output power (40 mA  2  0.5 V) = 40 mW – output current (20 mA  12 ports); output power (20 mA  12  0.5 V) = 120 mW – output current (1 mA  3 ports); output power (1 mA  3  0.5 V) = 1.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver Table 16. LQFP48 power dissipation and output current capability Measurement LQFP48 Tamb = 25 C maximum power dissipation (chip + output drivers) 1590 mW maximum power dissipation (output drivers only) 1460 mW maximum drive current per channel 1460 mW  ----------------------------------- = 121.7 mA [1] 24-bit  0.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 13. Static characteristics Table 18. Static characteristics VDD = 2.3 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 2.3 - 5.5 V VDD = 2.7 V - 0.5 5.5 mA VDD = 3.6 V - 1.5 8 mA VDD = 5.5 V - 17 25 mA VDD = 2.7 V - 0.5 5 A VDD = 3.6 V - 1.0 10 A - 6 15 A - 1.70 2.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 14. Dynamic characteristics Table 19. Dynamic characteristics Symbol Parameter fUSCL Conditions Min Typ Max Unit USCL clock frequency - - 5 MHz tBUF bus free time between a STOP and START condition 0.08 - - s tHD;STA hold time (repeated) START condition 0.05 - - s tSU;STA set-up time for a repeated START condition 0.05 - - s tSU;STO set-up time for STOP condition 0.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver protocol START condition (S) tSU;STA bit 7 MSB tLOW bit 1 (D1) bit 6 tHIGH STOP condition (P) (always set to 1 by master) bit 0 (D0) 9th clock 1 / fUSCL 0.7 × VDD 0.3 × VDD USCL tBUF tf tr tSU;STO 0.7 × VDD 0.3 × VDD USDA td(USCL-Q) tHD;STA tSU;DAT tHD;DAT output data LED[0:23] td(USDA-Q) output data LED[0:23] 002aag616 Rise and fall times refer to VIL and VIH. Fig 16.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 16. Package outline LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm SOT313-2 c y X 36 25 A 37 24 ZE e E HE A A2 (A 3) A1 w M θ bp pin 1 index Lp L 13 48 detail X 12 1 ZD e v M A w M bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 1.6 0.20 0.05 1.45 1.35 0.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 17. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 18. Soldering of SMD packages This text provides a very brief insight into a complex technology.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 18.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 20. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 19. Abbreviations Table 22.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 20. Revision history Table 23. Revision history Document ID Release date Data sheet status Change notice Supersedes PCU9656 v.1 20111208 Product data sheet - - PCU9656 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 8 December 2011 © NXP B.V. 2011. All rights reserved.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 21. Legal information 21.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements.
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PCU9656 NXP Semiconductors 24-bit UFm 5 MHz I2C-bus 100 mA 40 V LED driver 23. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 7.1.1 7.1.2 7.1.3 7.1.4 7.2 7.3 7.3.1 7.3.2 7.3.3 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 2 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . .