Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsFETsPHB32N06LT,118, MOSFET

PHP32N06LT; PHB32N06LT

N-channel enhancement mode ﬁeld effect transistor

Rev. 01 — 06 November 2001 Product data

1. Description

N-channel enhancement mode ﬁeld-effect power transistor in a plastic package using

TrenchMOS™

technology.

Product availability:

PHP32N06LT in SOT78 (TO220AB)

PHB32N06LT in SOT404 (D

-PAK).

2. Features

■ TrenchMOS™ technology

■ Logic level compatible.

3. Applications

■ General purpose switching

■ Switched mode power supplies.

4. Pinning information

[1] It is not possible to make connection to pin 2 of the SOT404 package.

1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.

Table 1: Pinning - SOT78 (TO-220AB), SOT404 (D

-PAK), simpliﬁed outline and symbol

Pin Description Simpliﬁed outline Symbol

1 gate (g)

SOT78 (TO-220AB) SOT404 (D

-PAK)

2 drain (d)

[1]

3 source (s)

mb mounting base;

connected to drain (d)

MBK106

MBK116

MBB076

Summary of content (13 pages)

PAGE 1
PHP32N06LT; PHB32N06LT N-channel enhancement mode field effect transistor Rev. 01 — 06 November 2001 Product data 1. Description N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOS™1 technology. Product availability: PHP32N06LT in SOT78 (TO220AB) PHB32N06LT in SOT404 (D2-PAK). 2. Features ■ TrenchMOS™ technology ■ Logic level compatible. 3. Applications ■ General purpose switching ■ Switched mode power supplies. 4.
PAGE 2
PHP32N06LT; PHB32N06LT Philips Semiconductors N-channel enhancement mode field effect transistor 5. Quick reference data Table 2: Quick reference data Symbol Parameter Conditions Typ Max Unit - 60 V VDS drain-source voltage (DC) ID drain current (DC) Tmb = 25 °C; VGS = 5 V - 34 A Ptot total power dissipation Tmb = 25 °C - 97 W Tj junction temperature - 175 °C RDSon drain-source on-state resistance Tj = 25 °C; VGS = 5 V; ID = 20 A 30 40 mΩ Tj = 25 °C; VGS = 4.
PAGE 3
PHP32N06LT; PHB32N06LT Philips Semiconductors N-channel enhancement mode field effect transistor 03aa16 120 03aa24 120 I der Pder (%) (%) 80 80 40 40 0 0 0 0 50 100 150 50 100 150 200 o Tmb ( C) 200 o Tmb ( C) VGS ≥ 4.5 V P tot P der = ---------------------- × 100% P ° ID I der = ------------------- × 100% I ° tot ( 25 C ) D ( 25 C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2.
PAGE 4
PHP32N06LT; PHB32N06LT Philips Semiconductors N-channel enhancement mode field effect transistor 7. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter Rth(j-a) Rth(j-mb) thermal resistance from junction to ambient thermal resistance from junction to mounting base Conditions Value Unit vertical in still air; SOT78 package 60 K/W mounted on printed circuit board; minimum footprint; SOT404 package 50 K/W Figure 4 1.55 K/W 7.
PAGE 5
Philips Semiconductors PHP32N06LT; PHB32N06LT N-channel enhancement mode field effect transistor 8. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit Tj = 25 °C 60 - - V Tj = −55 °C 55 - - V Tj = 25 °C 1 1.5 2 V Tj = 175 °C 0.5 - - V Tj = −55 °C - - 2.3 V - 0.
PAGE 6
PHP32N06LT; PHB32N06LT Philips Semiconductors N-channel enhancement mode field effect transistor Table 5: Characteristics…continued Tj = 25 °C unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit - 1 1.
PAGE 7
PHP32N06LT; PHB32N06LT Philips Semiconductors N-channel enhancement mode field effect transistor VGS(th) (V) 2 03aa36 10-1 ID (A) 10-2 03aa33 2.5 max typ 10-3 1.5 min min 1 typ max 10-4 10-5 0.5 10-6 0 -60 0 60 120 o 0 180 0.5 1 Tj ( C) 1.5 2 2.5 3 VGS (V) Tj = 25 °C; VDS = VGS ID = 1 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage.
PAGE 8
PHP32N06LT; PHB32N06LT Philips Semiconductors N-channel enhancement mode field effect transistor 03ah52 40 03ah54 10 VGS VGS = 0 V IS (A) ID = 20 A (V) Tj = 25 ºC 8 30 6 VDD = 14 V 20 VDD = 44 V 4 10 175 ºC Tj = 25 ºC 2 0 0 0 0.3 0.6 0.9 1.2 0 10 VSD (V) Tj = 25 °C and 175 °C; VGS = 0 V 30 QG (nC) 40 Tj = 25 °C; ID = 20 A Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. Fig 13.
PAGE 9
PHP32N06LT; PHB32N06LT Philips Semiconductors N-channel enhancement mode field effect transistor 9. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB E SOT78 A A1 p q mounting base D1 D L2 L1(1) Q b1 L 1 2 3 b c e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D D1 E e L L1(1) L2 max. p q Q mm 4.5 4.1 1.39 1.27 0.9 0.7 1.3 1.0 0.7 0.4 15.8 15.2 6.4 5.9 10.3 9.7 2.54 15.0 13.5 3.
PAGE 10
PHP32N06LT; PHB32N06LT Philips Semiconductors N-channel enhancement mode field effect transistor Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped) SOT404 A A1 E mounting base D1 D HD 2 Lp 1 3 c b e e Q 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b c D max. D1 E e Lp HD Q mm 4.50 4.10 1.40 1.27 0.85 0.60 0.64 0.46 11 1.60 1.20 10.30 9.70 2.54 2.90 2.10 15.80 14.80 2.60 2.
PAGE 11
Philips Semiconductors PHP32N06LT; PHB32N06LT N-channel enhancement mode field effect transistor 10. Revision history Table 6: Revision history Rev Date 01 20011106 CPCN Description - Product data; initial version. © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09024 Product data Rev.
PAGE 12
PHP32N06LT; PHB32N06LT Philips Semiconductors N-channel enhancement mode field effect transistor 11. Data sheet status Data sheet status[1] Product status[2] Definition Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification.
PAGE 13
Philips Semiconductors PHP32N06LT; PHB32N06LT N-channel enhancement mode field effect transistor Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . .