Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsFETsPHP225,118, MOSFET

1. Product profile

1.1 General description

Dual intermediate level P-channel enhancement mode Field-Effect Transistor (FET) in a

plastic package using vertical D-MOS technology. This product is designed and qualified

for use in computing, communications, consumer and industrial applications only.

1.2 Features and benefits

 Low conduction losses due to low

on-state resistance

 Suitable for high frequency

applications due to fast switching

characteristics

1.3 Applications

 Motor and actuator drivers

 Power management

 Synchronized rectification

1.4 Quick reference data

[1] Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 2 W at the same

time.

PHP225

Dual P-channel intermediate level FET

Rev. 04 — 17 March 2011 Product data sheet

SO8

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

drain-source voltage T

≥ 25 °C; T

≤ 150°C ---30V

drain current T

≤ 80°C ---2.3A

tot

total power dissipation T

=80°C

[1]

--2W

Static characteristics

DSon

drain-source on-state

resistance

=-10V; I

=-1A;

=25°C

- 0.22 0.25 Ω

Dynamic characteristics

gate-drain charge V

=-10V; I

=-2.3A;

=-15V; T

=25°C

-3-nC

Summary of content (12 pages)

PAGE 1
SO 8 PHP225 Dual P-channel intermediate level FET Rev. 04 — 17 March 2011 Product data sheet 1. Product profile 1.1 General description Dual intermediate level P-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using vertical D-MOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 S1 source1 2 G1 gate1 3 S2 source2 4 G2 gate2 5 D2 drain2 6 D2 drain2 7 D1 drain1 8 D1 drain1 Simplified outline Graphic symbol 8 5 D1 D1 D2 D2 1 4 S1 G1 S2 G2 SOT96-1 (SO8) sym115 3. Ordering information Table 3.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C - -30 V VGS gate-source voltage - - V VGSO gate-source voltage open drain -20 20 V ID drain current Tsp ≤ 80 °C - -2.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET mlb836 2.5 mbe155 −102 Ptot (W) 2.0 ID (A) −10 tp = (1) 10 μs 1.5 −1 1 ms 1.0 δ= P −10−1 tp T DC 0.1 s 0.5 t tp −10−2 −1 −10 0 50 0 100 150 Ts (°C) T 200 −1 −10 VDS (V) −102 δ = 0.01 Ts = 80 °C. (1) RDSon limitation. Fig 1. Power derating curve Fig 2. SOAR; P-channel 5. Thermal characteristics Table 5.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = -10 µA; VGS = 0 V; Tj = 25 °C -30 - - V VGS(th) gate-source threshold voltage ID = -1 mA; VDS = VGS; Tj = 25 °C -1 - -2.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET mbe144 600 mbe154 −10 VGS = −10 V ID (A) −8 C (pF) −6 V −7.5 V 400 −5 V −6 −4.5 V Ciss −4 200 −4 V Coss −3.5 V −2 Crss 0 −10 0 Fig 4. −20 −3 V VDS (V) Capacitance as a function of drain-source voltage; P-channel; typical values mbe157 −10 0 −30 Fig 5. −6 −6 −4 −4 −2 −2 Fig 6.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET mda165 104 mbe138 1.2 k 1.1 RDSon (mΩ) (1) (2)(3) (4) (5) 1.0 103 0.9 0.8 0.7 102 0 −2 −4 0.6 −10 −8 VGS (V) −6 −50 0 50 100 Tj (°C) 150 -VDS ≥ -ID x RDSon; Tj = 25 °C. (1) ID = -0.1 A. (2) ID = -0.5 A. Typical VGSth at ID = 1 mA; VDS = VGS = VGSth. (3) ID = -1 A. (4) ID = -2.3 A. (5) ID= -4.5 A. Fig 8. Drain-source on-state resistance as a function of drain current; typical values mbe146 1.8 k 1.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET 7. Package outline SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE v M A Z 5 8 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PHP225 v.4 20110317 Product data sheet - PHP225 v.3 - PHP225 v.2 Modifications: PHP225 v.3 PHP225 Product data sheet • Various changes to content. 20110104 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 04 — 17 March 2011 © NXP B.V. 2011.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET 9. Legal information 9.1 Data sheet status Document status [1] [2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
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PHP225 NXP Semiconductors Dual P-channel intermediate level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . .