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PSMN1R0-30YLC

N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using

NextPower technology

15 January 2015 Product data sheet

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1. General description

Logic level enhancement mode N-channel MOSFET in LFPAK package. This product

is designed and qualified for use in a wide range of industrial, communications and

domestic equipment.

2. Features and benefits

•

High reliability Power SO8 package, qualified to 175°C

•

Optimised for 4.5V Gate drive utilising NextPower Superjunction technology

•

Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads

•

Ultra low Rdson and low parasitic inductance

3. Applications

•

DC-to-DC converters

•

Lithium-ion battery protection

•

Load switching

•

Power OR-ing

•

Server power supplies

•

Sync rectifier

4. Quick reference data

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

drain-source voltage 25 °C ≤ T

≤ 175 °C - - 30 V

drain current T

= 25 °C; V

= 10 V; Fig. 2 [1] - - 100 A

tot

total power dissipation T

= 25 °C; Fig. 1 - - 272 W

junction temperature -55 - 175 °C

Static characteristics

= 4.5 V; I

= 25 A; T

= 25 °C;

Fig. 12

- 1.1 1.4 mΩR

DSon

drain-source on-state

resistance

= 10 V; I

= 25 A; T

= 25 °C;

Fig. 12

- 0.85 1.15 mΩ

Summary of content (14 pages)

PAGE 1
PSMN1R0-30YLC N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology 15 January 2015 Product data sheet 1. General description Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 2. Features and benefits • • • • High reliability Power SO8 package, qualified to 175°C Optimised for 4.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology Symbol Parameter Conditions Min Typ Max Unit VGS = 4.5 V; ID = 25 A; VDS = 15 V; - 14.6 26 nC - 50 70 nC Dynamic characteristics QGD gate-drain charge Fig. 14; Fig. 15 QG(tot) total gate charge VGS = 4.5 V; ID = 25 A; VDS = 15 V; Fig. 15; Fig. 14 [1] Continuous current is limited by package. 5. Pinning information Table 2.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology Symbol Parameter Conditions VGS gate-source voltage Ptot total power dissipation Tmb = 25 °C; Fig. 1 ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 VGS = 10 V; Tmb = 100 °C; Fig. 2 Min Max Unit -20 20 V - 272 W [1] - 100 A [1] - 100 A - 1450 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology 003a a e 941 104 ID (A) Limit R DS on = VDS / ID 103 tp =10 ms 102 100 ms 1 ms DC 10 10 ms 100 ms 1 10-1 10-1 Fig. 3. 1 10 102 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 003a a e 954 103 I AL (A) 102 (1) (2) 10 1 10-1 10-3 Fig. 4.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology 003a ae942 1 Z th(j-mb) (K/W) d = 0.5 0.2 10-1 0.1 0.05 0.02 P 10-2 tp T d= s ing le s hot tp 10 -3 10-6 Fig. 5. 10-5 10-4 10-3 10-2 t T 10-1 tp (s ) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration 10. Characteristics Table 7.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology Symbol Parameter Conditions Min Typ Max Unit RG gate resistance f = 1 MHz - 1.1 2.2 Ω ID = 25 A; VDS = 15 V; VGS = 10 V; - 103.5 145 nC - 50 70 nC ID = 0 A; VDS = 0 V; VGS = 10 V; Fig. 15 - 96.5 - nC Dynamic characteristics QG(tot) total gate charge Fig. 14; Fig. 15 ID = 25 A; VDS = 15 V; VGS = 4.5 V; Fig. 15; Fig.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology 003a a e 943 100 3 .0 2.8 ID (A) 6 VGS (V) = 2.4 50 25 0 Fig. 6. RDS on (mW) 4.5 10.0 75 4 2 2.2 0 003a a e 944 8 2.6 0.5 VDS (V) 0 1 Fig. 7.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology 003a a e 948 10-1 ID (A) VGS (th) (V) 10-2 10 Min -3 Typ 003a a e 947 3 Ma x (1 mA) 2 Ma x I D = 5mA 1mA 10-4 1 Min (5mA) 10-5 10-6 0 1 2 0 -60 3 VGS (V) Fig. 10. Sub-threshold drain current as a function of gate-source voltage 120 Tj ( C) 180 003a a e 946 2 2.4 RDS on (mW) 60 Fig. 11.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology 003a a e 952 10 VDS VGS (V) ID 8 VGS(pl) 6 6V VGS(th) VGS 1 5V 4 QGS1 QGS2 QGS V DS = 24V QGD 2 QG(tot) 003aaa508 0 Fig. 14. Gate charge waveform definitions 0 40 80 Q G (nC) 120 Fig. 15.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology 003a a f 444 ID (A) trr ta tb 0 0.25 IR M IRM t (s ) Fig. 18. Reverse recovery timing definition PSMN1R0-30YLC Product data sheet All information provided in this document is subject to legal disclaimers. 15 January 2015 © NXP Semiconductors N.V. 2015.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology 11. Package outline Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads E A2 A SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w b A X c 1/2 e A (A3) A1 C q L detail X 0 y C θ 5 mm 8° scale 0° Dimensions (mm are the original dimensions) Unit(1) mm A A1 A2 A3 b b2 max 1.20 0.15 1.10 0.50 4.41 nom 0.25 min 1.01 0.00 0.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
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PSMN1R0-30YLC NXP Semiconductors N-channel 30 V 1.15 mΩ logic level MOSFET in LFPAK using NextPower technology 13. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ...............................................