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PSMN1R4-40YLD

N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using

NextPower-S3 technology

26 August 2014 Product data sheet

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1. General description

Logic level gate drive N-channel enhancement mode MOSFET in 175 °C LFPAK56

package using advanced TrenchMOS Superjunction technology. This product has been

designed and qualified for high performance power switching applications.

2. Features and benefits

•

NextPower-S3 technology delivers ‘superfast switching with soft recovery’

•

Low Q

, Q

and Q

for high system efficiency and low EMI designs

•

Schottky-Plus body-diode, gives soft switching without the associated high I

DSS

leakage

•

Optimised for 4.5 V gate drive utilising NextPower-S3 Superjunction technology

•

High reliability LFPAK (Power-SO8) package, copper-clip, solder die attach and

qualified to 175 °C

•

Exposed leads can be wave soldered, visual solder joint inspection and high quality

solder joints

•

Low parasitic inductance and resistance

3. Applications

•

Synchronous rectification

•

DC-to-DC converters

•

High performance & high efficiency server power supply

•

Motor control

•

Power OR-ing

4. Quick reference data

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

drain-source voltage 25 °C ≤ T

≤ 175 °C - - 40 V

drain current T

= 25 °C; V

= 10 V; Fig. 2 [1] - - 100 A

tot

total power dissipation T

= 25 °C; Fig. 1 - - 238 W

junction temperature -55 - 175 °C

Static characteristics

DSon

drain-source on-state

resistance

= 10 V; I

= 25 A; T

= 25 °C;

Fig. 10

- 1.12 1.4 mΩ

Summary of content (13 pages)

PAGE 1
LF PA K 56 PSMN1R4-40YLD N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology 26 August 2014 Product data sheet 1. General description Logic level gate drive N-channel enhancement mode MOSFET in 175 °C LFPAK56 package using advanced TrenchMOS Superjunction technology. This product has been designed and qualified for high performance power switching applications. 2.
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PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology Symbol Parameter Conditions Min Typ Max Unit VGS = 4.5 V; ID = 25 A; Tj = 25 °C; - 1.38 1.85 mΩ - 13 - nC - 45 - nC Fig. 10 Dynamic characteristics QGD gate-drain charge VGS = 4.5 V; ID = 25 A; VDS = 20 V; Fig. 12; Fig. 13 QG(tot) total gate charge VGS = 4.5 V; ID = 25 A; VDS = 20 V; Fig. 12; Fig. 13 [1] Continuous current is limited by package. 5.
PAGE 3
PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
PAGE 4
PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology 03aa16 120 Pder (%) aaa-013028 320 ID (A) 240 80 160 40 (1) 80 0 Fig. 1. ID (A) 0 50 100 150 Tmb (°C) 0 200 Normalized total power dissipation as a function of mounting base temperature 0 25 50 75 100 125 150 175 Tmb (°C) 200 (1) Capped at 100A due to package Fig. 2.
PAGE 5
PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology Symbol Parameter Conditions Min Typ Max Unit Rth(j-a) thermal resistance from junction to ambient Fig. 5 - 50 - K/W Fig. 6 - 125 - K/W Zth(j-mb) (K/W) aaa-009500 1 δ = 0.5 0.2 10-1 0.1 0.05 0.02 single shot 10-2 P δ= tp 10-3 10-6 Fig. 4.
PAGE 6
PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology Symbol Parameter Conditions Min Typ Max Unit ΔVGS(th)/ΔT gate-source threshold voltage variation with temperature 25 °C ≤ Tj ≤ 150 °C - -4.
PAGE 7
PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology Symbol Parameter Conditions Min Typ Max Unit Qoss output charge VGS = 0 V; VDS = 20 V; f = 1 MHz; - 50 - nC Tj = 25 °C Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 15 - 0.78 1.2 V trr reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; - 47 - ns Qr recovered charge VDS = 20 V; Fig.
PAGE 8
PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology aaa-013035 300 ID (A) 250 aaa-013038 10 RDSon (mΩ) 2.8 V 3V 8 200 3.5 V 6 150 4 100 175°C 50 Tj = 25°C 4.5 V 2 10 V 0 Fig. 9. a 0 0.5 1 1.5 2 2.5 3 3.5 VGS (V) 0 4 Transfer characteristics; drain current as a function of gate-source voltage; typical values 0 60 120 180 240 ID (A) 300 Tj = 25 °C Fig. 10.
PAGE 9
PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology VGS (V) aaa-013040 10 aaa-013041 104 C (pF) Ciss 8 103 Coss 6 32 V 20 V 4 Crss 102 VDS = 8 V 2 0 0 20 40 60 80 QG (nC) 10 10-1 100 Fig. 13. Gate-source voltage as a function of gate charge; typical values IS (A) 1 10 VDS (V) Fig. 14.
PAGE 10
PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology 11. Package outline Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads E A2 A SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w b A X c 1/2 e A (A3) A1 C q L detail X 0 y C θ 5 mm 8° scale 0° Dimensions (mm are the original dimensions) Unit(1) mm A A1 A2 A3 b b2 max 1.20 0.15 1.10 0.50 4.41 nom 0.25 min 1.01 0.
PAGE 11
PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.
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PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
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PSMN1R4-40YLD NXP Semiconductors N-channel 40 V 1.4 mΩ logic level MOSFET in LFPAK56 using NextPower-S3 technology 13. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ...............................................