Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsFETsPSMN9R0-25MLC,115, MOSFET

1. Product profile

1.1 General description

Logic level enhancement mode N-channel MOSFET in LFPAK33 package. This product is

designed and qualified for use in a wide range of industrial, communications and domestic

equipment.

1.2 Features and benefits

 Low parasitic inductance and

resistance

 Optimised for 4.5V Gate drive utilising

NextPower Superjunction technology

 Ultra low QG, QGD, & QOSS for high

system efficiencies at low and high

loads

1.3 Applications

 DC-to-DC converters

 Load switching

 Synchronous buck regulator

1.4 Quick reference data

PSMN9R0-25MLC

N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33

using NextPower Technology

Rev. 3 — 15 June 2012 Product data sheet

LFPAK33

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

drain-source voltage T

= 25°C --25V

drain current T

=25°C; V

=10V; see Figure 1 --55A

tot

total power dissipation T

=25°C; see Figure 2 --45W

junction temperature -55 - 175 °C

Static characteristics

DSon

drain-source on-state

resistance

=4.5V; I

=15A; T

=25°C;

see Figure 10

- 9.8 11.3 mΩ

=10V; I

=15A; T

=25°C;

see Figure 10

- 7.55 8.65 mΩ

Dynamic characteristics

gate-drain charge V

=4.5V; I

=15A; V

=12.5V;

see Figure 12;

see Figure 13

-1.2-nC

G(tot)

total gate charge V

=4.5V; I

=15A; V

=12.5V;

see Figure 12

;

see Figure 13

-5.4-nC

Summary of content (14 pages)

PAGE 1
PA K 33 PSMN9R0-25MLC LF N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Rev. 3 — 15 June 2012 Product data sheet 1. Product profile 1.1 General description Logic level enhancement mode N-channel MOSFET in LFPAK33 package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits  Low parasitic inductance and resistance  Optimised for 4.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D G S mbb076 1 2 3 4 SOT1210 (LFPAK33) 3. Ordering information Table 3.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj792 60 03na19 120 ID (A) Pder (%) 45 80 30 40 15 0 0 0 Fig 1. 50 100 150 0 200 Tmb(°C) 50 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aaj793 102 IAL (A) 10 (1) (2) 1 10-3 Fig 3.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj794 103 ID (A) Limit RDSon = VDS / ID 102 tp =10 μs 100 μs 10 DC 1 ms 10 ms 1 100 ms 10-1 10-1 Fig 4. 1 10 102 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 5. Thermal characteristics Table 5.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 25 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 22.5 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C 1.3 1.5 1.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit td(on) turn-on delay time - 7.1 - ns tr rise time VDS = 12.5 V; RL = 0.8 Ω; VGS = 4.5 V; RG(ext) = 5 Ω - 10.1 - ns td(off) turn-off delay time - 11.1 - ns tf fall time Qoss output charge - 6.1 - ns VGS = 0 V; VDS = 12.5 V; f = 1 MHz; Tj = 25 °C - 5.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj798 60 003aaj799 60 ID (A) gfs (S) 45 45 30 30 15 15 Tj = 150 °C Tj = 25 °C 0 0 0 Fig 8. 15 30 45 ID (A) 60 Forward transconductance as a function of drain current; typical values 0 Fig 9. 2.6 2.8 2 3 4 VGS (V) Transfer characteristics; drain current as a function of gate-source voltage; typical values 003aaj802 30 RDSon (mΩ) 25 1 003aaj803 2 3 a 10V 1.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj804 10 VGS (V) VDS 8 ID 5V 6 20 V VGS(pl) 4 VGS(th) VDS = 12.5 V VGS QGS1 2 QGS2 QGS QGD QG(tot) 0 0 003aaa508 Fig 12. Gate charge waveform definitions QG (nC) 15 003aaj806 60 IS (A) Ciss C (pF) 10 Fig 13.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003a a f 444 ID (A) trr ta tb 0 0.25 IRM I RM t (s ) Fig 16. Reverse recovery timing definition PSMN9R0-25MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 7. Package outline Plastic single ended surface mounted package (LFPAK33); 8 leads E A A e1 c1 b1 L SOT1210 E1 mounting base D1 D H 1 4 e b w X A A1 c C θ Lp y C detail X 0 2.5 Dimensions Unit(1) mm 5 mm scale A A1 b b1 c c1 D(1) D1 E(1) E1 e e1 H L Lp w y 3.40 0.25 0.50 max 0.90 0.10 0.35 0.35 0.20 0.30 2.70 2.35 3.40 2.45 nom 0.65 0.65 0.20 0.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PSMN9R0-25MLC v.3 20120615 Product data sheet - PSMN9R0-25MLC v.2 - PSMN9R0-25MLC v.1 Modifications: PSMN9R0-25MLC v.2 PSMN9R0-25MLC Product data sheet • Various changes to content.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 9. Legal information 9.1 Data sheet status Document status[1] [2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published athttp://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply.
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PSMN9R0-25MLC NXP Semiconductors N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . .