Datasheet

1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
industrial and communications applications.
1.2 Features and benefits
 High efficiency due to low switching
and conduction losses
 Suitable for logic level gate drive
sources
1.3 Applications
 Class-D amplifiers
 DC-to-DC converters
 Motor control
 Server power supplies
1.4 Quick reference data
PSMN9R1-30YL
N-channel 9.1 mΩ 30 V TrenchMOS logic level FET in LFPAK
Rev. 2 — 16 May 2011 Product data sheet
LFPAK
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DS
drain-source voltage T
j
≥ 25 °C; T
j
≤ 175°C --30V
I
D
drain current T
mb
=25°C; V
GS
=10V;
see Figure 1
--57A
P
tot
total power dissipation T
mb
= 25 °C; see Figure 2 --52W
Static characteristics
R
DSon
drain-source on-state
resistance
V
GS
=10V; I
D
=15A;
T
j
=25°C
-7.89.1mΩ
Dynamic characteristics
Q
GD
gate-drain charge V
GS
=10V; I
D
=45A;
V
DS
=15V; see Figure 14;
see Figure 15
-4.1-nC
Q
G(tot)
total gate charge V
GS
=4.5V; I
D
=45A;
V
DS
=15V; see Figure 14;
see Figure 15
-8.4-nC
Avalanche ruggedness
E
DS(AL)S
non-repetitive
drain-source avalanche
energy
V
GS
=10V; T
j(init)
=25°C;
I
D
=57A; V
sup
≤ 30 V;
R
GS
=50Ω; unclamped
--17mJ