Datasheet

Chapter 11 Internal Clock Source (S08ICSV2)
MC9S08SG32 Data Sheet, Rev. 8
174 Freescale Semiconductor
Figure 11-2. Internal Clock Source (ICS) Block Diagram
11.1.4 Modes of Operation
There are seven modes of operation for the ICS: FEI, FEE, FBI, FBILP, FBE, FBELP, and stop.
11.1.4.1 FLL Engaged Internal (FEI)
In FLL engaged internal mode, which is the default mode, the ICS supplies a clock derived from the FLL
which is controlled by the internal reference clock. The BDC clock is supplied from the FLL.
11.1.4.2 FLL Engaged External (FEE)
In FLL engaged external mode, the ICS supplies a clock derived from the FLL which is controlled by an
external reference clock. The BDC clock is supplied from the FLL.
11.1.4.3 FLL Bypassed Internal (FBI)
In FLL bypassed internal mode, the FLL is enabled and controlled by the internal reference clock, but is
bypassed. The ICS supplies a clock derived from the internal reference clock. The BDC clock is supplied
from the FLL.
DCO
Filter
RDIV
TRIM
/ 2
9
External Reference
IREFS
Clock Source
Block
CLKS
n=0-7
/ 2
n
n=0-3
/ 2
n
Internal
Reference
Clock
BDIV
9
ICSLCLK
ICSOUT
ICSIRCLK
EREFS
RANGE
EREFSTENHGO
Optional
IREFSTEN
ICSERCLK
Internal Clock Source Block
LP
ICSFFCLK
ERCLKEN
IRCLKEN
DCOOUT
FLL
RDIV_CLK