Datasheet

Chapter 15 Serial Peripheral Interface (S08SPIV3)

MC9S08SG32 Data Sheet, Rev. 8

234 Freescale Semiconductor

15.4.4 SPI Status Register (SPIS)

This register has three read-only status bits. Bits 6, 3, 2, 1, and 0 are not implemented and always read 0.

Writes have no meaning or effect.

Table 15-5. SPI Baud Rate Prescaler Divisor

SPPR2:SPPR1:SPPR0 Prescaler Divisor

0:0:0 1

0:0:1 2

0:1:0 3

0:1:1 4

1:0:0 5

1:0:1 6

1:1:0 7

1:1:1 8

Table 15-6. SPI Baud Rate Divisor

SPR2:SPR1:SPR0 Rate Divisor

0:0:0 2

0:0:1 4

0:1:0 8

0:1:1 16

1:0:0 32

1:0:1 64

1:1:0 128

1:1:1 256

76543210

R SPRF 0 SPTEF MODF 0000

Reset 00100000

= Unimplemented or Reserved

Figure 15-8. SPI Status Register (SPIS)