Datasheet

Chapter 5 Resets, Interrupts, and General System Control
MC9S08SG32 Data Sheet, Rev. 8
Freescale Semiconductor 69
5.7.2 System Background Debug Force Reset Register (SBDFR)
This high page register contains a single write-only control bit. A serial background command such as
WRITE_BYTE must be used to write to SBDFR. Attempts to write this register from a user program are
ignored. Reads always return 0x00.
Figure 5-3. System Background Debug Force Reset Register (SBDFR)
3
ILAD
Illegal Address — Reset was caused by an attempt to access either data or an instruction at an unimplemented
memory address.
0 Reset not caused by an illegal address
1 Reset caused by an illegal address
1
LVD
Low Voltage Detect — If the LVDRE bit is set and the supply drops below the LVD trip voltage, an LVD reset will
occur. This bit is also set by POR.
0 Reset not caused by LVD trip or POR.
1 Reset caused by LVD trip or POR.
76543210
R00000000
W BDFR
1
1
BDFR is writable only through serial background debug commands, not from user programs.
Reset: 00000000
= Unimplemented or Reserved
Table 5-4. SBDFR Register Field Descriptions
Field Description
0
BDFR
Background Debug Force Reset — A serial background command such as WRITE_BYTE can be used to allow
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program.
Table 5-3. SRS Register Field Descriptions
Field Description