Datasheet

Chapter 5 Resets, Interrupts, and General System Control
MC9S08SG32 Data Sheet, Rev. 8
72 Freescale Semiconductor
5.7.5 System Device Identification Register (SDIDH, SDIDL)
These high page read-only registers are included so host development systems can identify the HCS08
derivative and revision number. This allows the development software to recognize where specific memory
blocks, registers, and control bits are located in a target MCU.
Figure 5-6. System Device Identification Register — High (SDIDH)
76543210
R1 ID11 ID10 ID9 ID8
W
Reset: 1
1
1
- Bit 7 is a mask option tie off that is used internally to determine that the device is a MC9S08SG32 Series.
———0000
= Unimplemented or Reserved
Table 5-7. SDIDH Register Field Descriptions
Field Description
7 Bit 7 will read as a 1 for the MC9S08SG32 Series devices; writes have no effect.
6:4
Reserved
Bits 6:4 are reserved. Reading these bits will result in an indeterminate value; writes have no effect.
3:0
ID[11:8]
Part Identification Number — Each derivative in the HCS08 Family has a unique identification number. The
MC9S08SG32 is hard coded to the value 0x01A. See also ID bits in Table 5-8.
76543210
R ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0
W
Reset: 00011010
= Unimplemented or Reserved
Figure 5-7. System Device Identification Register — Low (SDIDL)
Table 5-8. SDIDL Register Field Descriptions
Field Description
7:0
ID[7:0]
Part Identification Number — Each derivative in the HCS08 Family has a unique identification number. The
MC9S08SG32 is hard coded to the value 0x01A. See also ID bits in Table 5-7.