Datasheet

Electrical Characteristics
MC9S12G Family Reference Manual, Rev.1.23
1226 Freescale Semiconductor
A.7.1.1 Erase Verify All Blocks (Blank Check) (FCMD=0x01)
The time required to perform a blank check on all blocks is dependent on the location of the first non-blank
word starting at relative address zero. It takes one bus cycle per phrase to verify plus a setup of the
command. Assuming that no non-blank location is found, then the time to erase verify all blocks is given
by:
FTMRG240K2, FTMRG192K2:
FTMRG128K1,FTMRG96K1:
FTMRG64K1, FTMRG48K1:
FTMRG32K1,FTMRG16K1:
A.7.1.2 Erase Verify Block (Blank Check) (FCMD=0x02)
The time required to perform a blank check is dependent on the location of the first non-blank word starting
at relative address zero. It takes one bus cycle per phrase to verify plus a setup of the command.
Assuming that no non-blank location is found, then the time to erase verify a P-Flash block is given by:
FTMRG240K2, FTMRG192K2:
FTMRG128K1, FTMRG96K1:
t
check
64400
1
f
NVMBUS
---------------------
⋅=
t
check
33600
1
f
NVMBUS
---------------------
⋅=
t
check
18000
1
f
NVMBUS
---------------------
⋅=
t
check
9300
1
f
NVMBUS
---------------------
⋅=
t
pcheck
62200
1
f
NVMBUS
---------------------
⋅=
t
pcheck
33400
1
f
NVMBUS
---------------------
⋅=