Datasheet

Electrical Characteristics
MC9S12G Family Reference Manual, Rev.1.23
1240 Freescale Semiconductor
A.12 Electrical Specification for Voltage Regulator
Table A-43. Voltage Regulator Characteristics (Junction Temperature From –40°C To +150°C)
Num C Characteristic Symbol Min Typical Max Unit
1
P Input Voltages
V
VDDR,A
3.13 — 5.5 V
2
P
V
DDA
Low Voltage Interrupt Assert Level
1
V
DDA
Low Voltage Interrupt Deassert Level
1
Monitors VDDA, active only in Full Performance Mode. Indicates I/O & ADC performance degradation due to low supply
voltage.
V
LVIA
V
LVID
4.04
4.19
4.23
4.38
4.40
4.49
V
V
3
P
V
DDX
Low Voltage Reset Deassert
234
2
Device functionality is guaranteed on power down to the LVR assert level
3
Monitors VDDX, active only in Full Performance Mode. MCU is monitored by the POR in RPM (see Figure A-6)
4
V
LVRXA
< V
LVRXD
. The hysteresis is unspecified and untested.
V
LVRXD
— 3.05 3.13 V
4
P
V
DDX
Low Voltage Reset Assert
234
V
LVRXA
2.95 3.02 — V
5
T
CPMU ACLK frequency
(CPMUACLKTR[5:0] = %000000)
f
ACLK
— 10 — KHz
6
C
Trimmed ACLK internal clock
5
∆f / f
nominal
5
The ACLK Trimming CPMUACLKTR[5:0] bits must be set so that f
ACLK
=10KHz.
df
ACLK
- 5% — + 5% —
7
D
The first period after enabling the counter
by APIFE might be reduced by ACLK start
up delay
t
sdel
— — 100 us
8
D
The first period after enabling the COP
might be reduced by ACLK start up delay
t
sdel
— — 100 us
9
P
Output Voltage Flash
Full Performance Mode
Reduced Power Mode (MCU STOP mode)
V
DDF
2.6
1.1
2.82
1.6
2.9
1.98
V
V
10
C
V
DDF
Voltage Distribution
over input voltage V
DDA
6
4.5V ≤ V
DDA
≤ 5.5V, T
A
= 27
o
C
compared to V
DDA
= 5.0V
6
VDDR ≥ 3.13V
∆
VDDF
-5 0 5 mV
11
C
V
DDF
Voltage Distribution
over ambient temperature T
A
V
DDA
= 5V, -40°C ≤ T
A
≤ 125°C
compared to V
DDF
production test value
(see A.16, “ADC Conversion Result
Reference”)
∆
VDDF
-20 - +20 mV