Datasheet

Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual, Rev.1.23
162 Freescale Semiconductor
2.3 PIM Routing - Functional description
Table 2-4. Signals and Priorities
Port Pin Signal
Signals per Device and Package
(signal priority on pin from top to bottom)
Legend
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GN32 / GNA32 GN16 / GNA16
G64 / G48
GN48 GN32 GN16 GN32 GN16
■ Signal available on pin
❍ Routing option on pin
❏ Routing reset location
Not available on pin
100 64 48 32 20 I/O Description
- BKGD MODC
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ I MODC input during
RESET
BKGD
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ I/O BDM communication
A PA7-PA0 [PA7:PA0]
■ ■ ■ I/O GPIO
B PB7-PB6 [PB7:PB6]
■ ■ ■ I/O GPIO
PB5
XIRQ ■ ■ ■ I Non-maskable
level-sensitive interrupt
[PB5]
■ ■ ■ I/O GPIO
PB4
IRQ ■ ■ ■ I Maskable level- or
falling-edge sensitive
interrupt
[PB4]
■ ■ ■ I/O GPIO
PB3 [PB3]
■ ■ ■ I/O GPIO
PB2 ECLKX2
■ ■ ■ O Free-running clock
(ECLK x 2)
[PB2]
■ ■ ■ I/O GPIO
PB1 API_EXTCLK
❏ ❏ ❏ O API Clock
[PB1]
■ ■ ■ I/O GPIO
PB0 ECLK
■ ■ ■ O Free-running clock
[PB0]
■ ■ ■ I/O GPIO
C PC7 DACU1
■ O DAC1 output unbuffered
[PC7]
■ ■ ■ I/O GPIO
PC6 AMPP1
■ I DAC1 non-inv. input (+)
[PC6]
■ ■ ■ I/O GPIO
PC5 AMPM1
■ I DAC1 inverting input (-)
[PC5]
■ ■ ■ I/O GPIO
PC4-PC2 AN15-AN13
❍ ❍ I ADC analog
[PC4:PC2]
■ ■ ■ I/O GPIO
PC1-PC0 AN11-AN10
❍ ❍ I ADC analog
[PC1:PC0]
■ ■ ■ I/O GPIO
D PD7-PD0 [PD7:PD0]
■ ■ ■ I/O GPIO