Datasheet

Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual, Rev.1.23
166 Freescale Semiconductor
P PP7-PP6 PWM7-PWM6
O PWM channel
[PTP7:PTP6]/
KWP7-KWP6
I/O GPIO with interrupt
PP5-PP4 PWM5-PWM4
O PWM channel
[PTP5:PTP4]/
KWP5-KWP4
I/O GPIO with interrupt
PP3-PP2 PWM3-PWM2
O PWM channel
ETRIG3-
ETRIG2
I ADC external trigger
[PTP3:PTP2]/
KWP3-KWP2
I/O GPIO with interrupt
PP1 PWM1
O PWM channel
ECLKX2
O Free-running clock
(ECLK x 2)
ETRIG1
I ADC external trigger
[PTP1]/
KWP1
I/O GPIO with interrupt
PP0 PWM0
O PWM channel
API_EXTCLK
O API Clock
ETRIG0
I ADC external trigger
[PTP0]/
KWP0
I/O GPIO with interrupt
Table 2-4. Signals and Priorities
Port Pin Signal
Signals per Device and Package
(signal priority on pin from top to bottom)
Legend
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GN32 / GNA32
GN16 / GNA16
G64 / G48
GN48
GN32
GN16
GN32
GN16
Signal available on pin
Routing option on pin
Routing reset location
Not available on pin
100 64 48 32 20 I/O Description