Datasheet

Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor 167
J PJ7
SS2 I/O SPI slave select
[PTJ7]/
KWJ7
I/O GPIO with interrupt
PJ6 SCK2
I/O SPI serial clock
[PTJ6]/
KWJ6
I/O GPIO with interrupt
PJ5 MOSI2
I/O SPI master out/slave in
[PTJ5]/
KWJ5
I/O GPIO with interrupt
PJ4 MISO2
I/O SPI master in/slave out
[PTJ4]/
KWJ4
I/O GPIO with interrupt
PJ3
SS1 I/O SPI slave select
PWM7
O PWM channel
[PTJ3]/
KWJ3
I/O GPIO with interrupt
PJ2 SCK1
I/O SPI serial clock
IOC7
I/O Timer channel
[PTJ2]/
KWJ2
I/O GPIO with interrupt
PJ1 MOSI1
I/O SPI master out/slave in
IOC6
I/O Timer channel
[PTJ1]/
KWJ1
I/O GPIO with interrupt
PJ0 MISO1
I/O SPI master in/slave out
PWM6
I/O Timer channel
[PTJ0]/
KWJ0
I/O GPIO with interrupt
Table 2-4. Signals and Priorities
Port Pin Signal
Signals per Device and Package
(signal priority on pin from top to bottom)
Legend
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GN32 / GNA32
GN16 / GNA16
G64 / G48
GN48
GN32
GN16
GN32
GN16
Signal available on pin
Routing option on pin
Routing reset location
Not available on pin
100 64 48 32 20 I/O Description