Datasheet

Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual, Rev.1.23
168 Freescale Semiconductor
AD PAD15 DACU0
O DAC0 output unbuffered
AN15
I ADC analog
[PT0AD7]/
KWAD15
I/O GPIO with interrupt
PAD14 AMPP0
I DAC0 non-inv. input (+)
AN14
I ADC analog
[PT0AD6]/
KWAD14
I/O GPIO with interrupt
PAD13 AMPM0
I DAC0 inverting input (-)
AN13
I ADC analog
[PT0AD5]/
KWAD13
I/O GPIO with interrupt
PAD12 AN12
I ADC analog
[PT0AD4]/
KWAD12
I/O GPIO with interrupt
PAD11 AMP0
O DAC0 output buffered
DACU0
O DAC0 output unbuffered
ACMPM
I ACMP inverting input (-)
AN11
I ADC analog
[PT0AD3]/
KWAD11
I/O GPIO with interrupt
PAD10 AMP1
O DAC1 output buffered
DACU1
O DAC1 output unbuffered
ACMPP
I ACMP non-inv. input (+)
AN10
I ADC analog
[PT0AD2]/
KWAD10
I/O GPIO with interrupt
PAD9 ACMPO
O ACMP unsync. dig. out
AN9
I ADC analog
[PT0AD1]/
KWAD9
I/O GPIO with interrupt
PAD8 AN8
I ADC analog
[PT0AD0]/
KWAD8
I/O GPIO with interrupt
Table 2-4. Signals and Priorities
Port Pin Signal
Signals per Device and Package
(signal priority on pin from top to bottom)
Legend
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GN32 / GNA32
GN16 / GNA16
G64 / G48
GN48
GN32
GN16
GN32
GN16
Signal available on pin
Routing option on pin
Routing reset location
Not available on pin
100 64 48 32 20 I/O Description