Datasheet

Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual, Rev.1.23
176 Freescale Semiconductor
PS4 The SPI0 MISO signal is mapped to this pin when used with the SPI function. Depending on the
configuration of the enabled SPI0 the I/O state is forced to be input or output.
20 TSSOP: The SCI0 RXD signal is mapped to this pin when used with the SCI function. If the SCI0
RXD signal is enabled and routed here the I/O state will be forced to input.
20 TSSOP: The PWM channel 2 signal is mapped to this pin when used with the PWM function. If the
PWM channel is enabled and routed here the I/O state is forced to output.
32 LQFP: The PWM channel 4 signal is mapped to this pin when used with the PWM function. The
enabled PWM channel forces the I/O state to be an output.
20 TSSOP: The ADC ETRIG2 signal is mapped to this pin if PWM channel 2 is routed here. The
enabled external trigger function has no effect on the I/O state. Refer to Section 2.6.4, “ADC External
Triggers ETRIG3-0”.
Signal priority:
20 TSSOP: MISO0 > RXD0 > PWM2 > GPO
32 LQFP: MISO0 > PWM4 > GPO
Others: MISO0 > GPO
PS3 Except 20 TSSOP and 32 LQFP: The SCI1 TXD signal is mapped to this pin when used with the SCI
function. If the SCI1 TXD signal is enabled the I/O state will depend on the SCI1 configuration.
Signal priority:
48/64/100 LQFP: TXD1 > GPO
PS2 Except 20 TSSOP and 32 LQFP: The SCI1 RXD signal is mapped to this pin when used with the SCI
function. If the SCI1 RXD signal is enabled the I/O state will be forced to be input.
Signal priority:
20 TSSOP and 32 LQFP: GPO
Others: RXD1 > GPO
PS1 Except 20 TSSOP: The SCI0 TXD signal is mapped to this pin when used with the SCI function. If the
SCI0 TXD signal is enabled the I/O state will depend on the SCI0 configuration.
Signal priority:
Except 20 TSSOP: TXD0 > GPO
PS0 Except 20 TSSOP: The SCI0 RXD signal is mapped to this pin when used with the SCI function. If the
SCI0 RXD signal is enabled the I/O state will be forced to be input.
Signal priority:
20 TSSOP: GPO
Others: RXD0 > GPO
Table 2-12. Port S Pins PS7-0 (continued)