Datasheet

S12 Clock, Reset and Power Management Unit (S12CPMU)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor 387
Table 10-14. COP Watchdog Rates if COPOSCSEL1=1
CR2 CR1 CR0
COPCLK
Cycles to Time-out
(COPCLK is ACLK -
internal RC-Oscillator clock)
0 0 0 COP disabled
001 2
7
010 2
9
011 2
11
100 2
13
101 2
15
110 2
16
111 2
17